> Hi Andrew, > > Isn't the serdes interface just a normal PHY - the register set in > Viviens debugfs patch certainly looks like an 88e1545 in one of the > switches I've here (I think on the dev rev B). Is there a reason why > this PHY isn't visible as a normal PHY, just like we export the other > internal PHYs?
Humm, interesting idea. Yes, it looks like a normal PHY. It is however not contiguous to the internal PHYs on the 6352. You probably can however see it, if you look on the MDIO bus, at address 0xf. Depends on what mode the ports are in, the SERDES can be connected to either port 4 or 5. Port 5 does not have an internal PHY, but port 4 does. We could determine what port is using the SERDES, and redirect PHY read/writes to the SERDES interface. But it gets a bit complex for port 4, since it can use either copper or SERDES depending on which comes up first. So suppose you need to be able to see both the copper PHY and the SERDES, so you can initialize them both, in order for one to actually come up. Andrew
