Hi Joao/Peppe,
Observed this issue more frequently with multi-channel case. Am I missing
something in DT ?
Please help here to understand the issue.
Thanks,
Bhadram
-----Original Message-----
From: Bhadram Varka
Sent: Thursday, November 16, 2017 9:41 AM
To: linux-netdev <netdev@vger.kernel.org>
Subject: NETDEV WATCHDOG: eth0 (dwc-eth-dwmac): transmit queue 1
timed out
Hi,
I am trying to enable multi-queue in Tegra186 EQOS (which has support for 4
channels). Observed below netdev watchdog warning. Its easily reproable with
iperf test.
In normal ping scenario this is not observed. I did not observe any issue if we
disable TSO. Looks like issue in stmmac_tso_xmit() in multi-channel scenario.
[ 88.801672] NETDEV WATCHDOG: eth0 (dwc-eth-dwmac): transmit queue 0 timed out
[ 88.808818] ------------[ cut here ]------------
[ 88.813435] WARNING: CPU: 5 PID: 0 at net/sched/sch_generic.c:320
dev_watchdog+0x2cc/0x2d8
[ 88.821681] Modules linked in: dwmac_dwc_qos_eth stmmac_platform crc32_ce
crct10dif_ce stmmac ip_tables x_tables ipv6
[ 88.832290] CPU: 5 PID: 0 Comm: swapper/5 Tainted: G S
4.14.0-rc7-01956-g9395db5-dirty #21
[ 88.841663] Hardware name: NVIDIA Tegra186 P2771-0000 Development Board (DT)
[ 88.848697] task: ffff8001ec8fd400 task.stack: ffff000009e38000
[ 88.854606] PC is at dev_watchdog+0x2cc/0x2d8
[ 88.858952] LR is at dev_watchdog+0x2cc/0x2d8
[ 88.863300] pc : [<ffff00000894a76c>] lr : [<ffff00000894a76c>] pstate:
20000145
[ 88.870678] sp : ffff00000802bd80
[ 88.873983] x29: ffff00000802bd80 x28: 00000000000000a0
[ 88.879287] x27: 00000000ffffffff x26: ffff8001eae2c3b0
[ 88.884589] x25: 0000000000000005 x24: ffff8001ecb6be80
[ 88.889891] x23: ffff8001eae2c39c x22: ffff8001eae2bfb0
[ 88.895192] x21: ffff8001eae2c000 x20: ffff000008fe7000
[ 88.900493] x19: 0000000000000001 x18: 0000000000000010
[ 88.905795] x17: 0000000000000000 x16: 0000000000000000
[ 88.911098] x15: ffffffffffffffff x14: 756f2064656d6974
[ 88.916399] x13: 2031206575657571 x12: ffff000008fe9df0
[ 88.921699] x11: ffff000008586180 x10: 642d6874652d6377
[ 88.927000] x9 : 0000000000000016 x8 : 3a474f4448435441
[ 88.932301] x7 : 572056454454454e x6 : 000000000000014f
[ 88.937602] x5 : 0000000000000020 x4 : 0000000000000000
[ 88.942902] x3 : 0000000000000000 x2 : ffff000008fec4c0
[ 88.948203] x1 : ffff8001ec8fd400 x0 : 0000000000000041
[ 88.953504] Call trace:
[ 88.955944] Exception stack(0xffff00000802bc40 to 0xffff00000802bd80)
[ 88.962371] bc40: 0000000000000041 ffff8001ec8fd400 ffff000008fec4c0
0000000000000000
[ 88.970184] bc60: 0000000000000000 0000000000000020 000000000000014f
572056454454454e
[ 88.977998] bc80: 3a474f4448435441 0000000000000016 642d6874652d6377
ffff000008586180
[ 88.985811] bca0: ffff000008fe9df0 2031206575657571 756f2064656d6974
ffffffffffffffff
[ 88.993624] bcc0: 0000000000000000 0000000000000000 0000000000000010
0000000000000001
[ 89.001439] bce0: ffff000008fe7000 ffff8001eae2c000 ffff8001eae2bfb0
ffff8001eae2c39c
[ 89.009252] bd00: ffff8001ecb6be80 0000000000000005 ffff8001eae2c3b0
00000000ffffffff
[ 89.017065] bd20: 00000000000000a0 ffff00000802bd80 ffff00000894a76c
ffff00000802bd80
[ 89.024879] bd40: ffff00000894a76c 0000000020000145 ffff000000b67570
0000000000000001
[ 89.032693] bd60: 0001000000000000 ffff8001ecb6b200 ffff00000802bd80
ffff00000894a76c
[ 89.040508] [<ffff00000894a76c>] dev_watchdog+0x2cc/0x2d8
[ 89.045900] [<ffff000008130d1c>] call_timer_fn.isra.5+0x24/0x80
[ 89.051809] [<ffff000008130e1c>] expire_timers+0xa4/0xb0
[ 89.057111] [<ffff000008130f68>] run_timer_softirq+0x140/0x170
[ 89.062933] [<ffff00000808196c>] __do_softirq+0x12c/0x228
[ 89.068323] [<ffff0000080ce180>] irq_exit+0xd0/0x108
[ 89.073278] [<ffff00000811a180>] __handle_domain_irq+0x60/0xb8
[ 89.079098] [<ffff000008081670>] gic_handle_irq+0x58/0xa8
[ 89.084484] Exception stack(0xffff000009e3be20 to 0xffff000009e3bf60)
[ 89.090910] be20: 0000000000000000 0000000000000000 0000000000000001
0000000000000000
[ 89.098724] be40: 0000000000000000 ffff000009e3bf60 00008001ecffd000
0000000000000001
[ 89.106537] be60: 0000000000000002 ffff000009e3bee0 0000000000000a00
0000000000000000
[ 89.114351] be80: 0000000000000001 0000000000000000 001c3dfbd9959589
00001daf5b7a4860
[ 89.122164] bea0: ffff00000825b000 0000000000000000 0000ffffc0311284
ffff000008fc5000
[ 89.129978] bec0: ffff000008fe9000 ffff000008fe9000 ffff000008fd04a0
ffff000008fe9e90
[ 89.137792] bee0: 0000000000000000 0000000000000000 ffff8001ec8fd400
0000000000000000
[ 89.145605] bf00: 0000000000000000 ffff000009e3bf60 ffff00000808548c
ffff000009e3bf60
[ 89.153418] bf20: ffff000008085490 0000000000000145 0000000000000000
0000000000000000
[ 89.161231] bf40: ffffffffffffffff ffff0000081409c4 ffff000009e3bf60
ffff000008085490
[ 89.169044] [<ffff0000080830f0>] el1_irq+0xb0/0x124
[ 89.173912] [<ffff000008085490>] arch_cpu_idle+0x10/0x18
[ 89.179213] [<ffff000008105f10>] do_idle+0x120/0x1e0
[ 89.184166] [<ffff00000810616c>] cpu_startup_entry+0x24/0x28
[ 89.189814] [<ffff00000808f1c8>] secondary_start_kernel+0x110/0x120
[ 89.196067] ---[ end trace 039d403d63546b77 ]---
Below are the DT changes -
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 0b0552c..ffe1b80 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -27,21 +27,40 @@
#gpio-cells = <2>;
gpio-controller;
};
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <0x4>;
+ snps,tx-sched-sp;
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+ queue1 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3E800>;
+ snps,low_credit = <0xFFC18000>;
+ snps,priority = <0x1>;
+ };
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <0x4>;
+ snps,rx-sched-sp;
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,priority = <0x0>;
+ };
+ };
ethernet@2490000 {
compatible = "nvidia,tegra186-eqos",
"snps,dwc-qos-ethernet-4.10";
reg = <0x0 0x02490000 0x0 0x10000>; @@ -57,6 +76,10 @@
snps,burst-map = <0x7>;
snps,txpbl = <32>;
snps,rxpbl = <8>;
+
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
