On Thu, 2017-08-17 at 16:29 +0300, Saeed Mahameed wrote: > From: Or Gerlitz <ogerl...@mellanox.com> [] > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c > b/drivers/net/ethernet/mellanox/mlx5/core/eq.c [] > @@ -188,6 +188,7 @@ static enum mlx5_dev_event port_subtype_event(u8 subtype) > static void eq_update_ci(struct mlx5_eq *eq, int arm) > { > __be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2); > + > u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24); > __raw_writel((__force u32)cpu_to_be32(val), addr); > /* We still want ordering, just not swabbing, so add a barrier */
checkpatch is stupid. The blank line should be after u32 val = ... and not after __be32 __iomem *addr = ...