This IP core has support for mii connectivity to the phy, so be ready to
connect to it when this is the case.

Signed-off-by: Alvaro Gamez Machado <alvaro.ga...@hazent.com>
---
 drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c 
b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 33c595f4691d..9b3f55449b5e 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -935,7 +935,11 @@ static int axienet_open(struct net_device *ndev)
                return ret;
 
        if (lp->phy_node) {
-               if (lp->phy_type == XAE_PHY_TYPE_GMII) {
+               if (lp->phy_type == XAE_PHY_TYPE_MII) {
+                       phydev = of_phy_connect(lp->ndev, lp->phy_node,
+                                               axienet_adjust_link, 0,
+                                               PHY_INTERFACE_MODE_MII);
+               } else if (lp->phy_type == XAE_PHY_TYPE_GMII) {
                        phydev = of_phy_connect(lp->ndev, lp->phy_node,
                                                axienet_adjust_link, 0,
                                                PHY_INTERFACE_MODE_GMII);
-- 
2.11.0

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