diff -Naru linux-2.6.16_orig/drivers/net/netxen/netxen_brdcfg.h
linux-2.6.16/drivers/net/netxen/netxen_brdcfg.h
--- linux-2.6.16_orig/drivers/net/netxen/netxen_brdcfg.h 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/netxen_brdcfg.h 2006-03-24
14:13:57.000000000 -0800
@@ -0,0 +1,279 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+/******************************************************************************
+* netxen_bdinfo.h - Phantom board information stored in flash.
+*
+*******************************************************************************
+*/
+#ifndef __NetXen_BRDINFO_H
+#define __NetXen_BRDINFO_H
+
+/* The version of the main data structure */
+#define NetXen_BDINFO_VERSION 1
+
+/* Magic number to let user know flash is programmed */
+#define NetXen_BDINFO_MAGIC 0x12345678
+
+/* Max number of Gig ports on a Phantom board */
+#define NetXen_MAX_PORTS 4
+
+/* MN */
+#define NetXen_MEM_MAX_SLOTS 2
+
+typedef enum {
+ NetXen_BRDTYPE_P1_BD = 0x0000,
+ NetXen_BRDTYPE_P1_SB = 0x0001,
+ NetXen_BRDTYPE_P1_SMAX = 0x0002,
+ NetXen_BRDTYPE_P1_SOCK = 0x0003,
+
+ NetXen_BRDTYPE_P2_SOCK_31 = 0x0008,
+ NetXen_BRDTYPE_P2_SOCK_35 = 0x0009,
+ NetXen_BRDTYPE_P2_SB35_4G = 0x000a,
+ NetXen_BRDTYPE_P2_SB31_10G = 0x000b,
+ NetXen_BRDTYPE_P2_SB31_2G = 0x000c,
+
+ NetXen_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d,
+ NetXen_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e,
+ NetXen_BRDTYPE_P2_SB31_10G_CX4 = 0x000f
+
+} netxen_brdtype_t;
+
+typedef enum {
+ NetXen_BRDMFG_INVENTEC=1
+} netxen_brdmfg;
+
+typedef struct {
+ union {
+ struct {
+ U16 brdnum;
+ netxen_brdtype_t brdtype;
+ };
+ U32 brdid;
+ };
+} netxen_brdid_t;
+
+#define CHIP_LOT_FAST 1
+#define CHIP_LOT_TYPICAL 2
+#define CHIP_LOT_SLOW 3
+
+#define CHIP_PKG_31x31 1
+#define CHIP_PKG_35x35 2
+typedef struct {
+ U32 id:20,
+ minor:4,
+ major:2,
+ lot:3,
+ pkg:3;
+} netxen_chipid_t;
+
+typedef enum {
+ MEM_ORG_128Mbx4 =0x0, /* DDR1 only */
+ MEM_ORG_128Mbx8 =0x1, /* DDR1 only */
+ MEM_ORG_128Mbx16 =0x2, /* DDR1 only */
+ MEM_ORG_256Mbx4 =0x3,
+ MEM_ORG_256Mbx8 =0x4,
+ MEM_ORG_256Mbx16 =0x5,
+ MEM_ORG_512Mbx4 =0x6,
+ MEM_ORG_512Mbx8 =0x7,
+ MEM_ORG_512Mbx16 =0x8,
+ MEM_ORG_1Gbx4 =0x9,
+ MEM_ORG_1Gbx8 =0xa,
+ MEM_ORG_1Gbx16 =0xb,
+ MEM_ORG_2Gbx4 =0xc,
+ MEM_ORG_2Gbx8 =0xd,
+ MEM_ORG_2Gbx16 =0xe,
+ MEM_ORG_128Mbx32 =0x10002, /* GDDR only */
+ MEM_ORG_256Mbx32 =0x10005 /* GDDR only */
+} netxen_mn_mem_org_t;
+
+typedef enum {
+ MEM_ORG_512Kx36 =0x0,
+ MEM_ORG_1Mx36 =0x1,
+ MEM_ORG_2Mx36 =0x2
+} netxen_sn_mem_org_t;
+
+typedef enum {
+ MEM_DEPTH_4MB = 0x1,
+ MEM_DEPTH_8MB = 0x2,
+ MEM_DEPTH_16MB = 0x3,
+ MEM_DEPTH_32MB = 0x4,
+ MEM_DEPTH_64MB = 0x5,
+ MEM_DEPTH_128MB = 0x6,
+ MEM_DEPTH_256MB = 0x7,
+ MEM_DEPTH_512MB = 0x8,
+ MEM_DEPTH_1GB = 0x9,
+ MEM_DEPTH_2GB = 0xa,
+ MEM_DEPTH_4GB = 0xb,
+ MEM_DEPTH_8GB = 0xc,
+ MEM_DEPTH_16GB = 0xd,
+ MEM_DEPTH_32GB = 0xe
+} netxen_mem_depth_t;
+
+/******************************************************************************
+*
+*
+*
+*******************************************************************************
+*/
+typedef struct {
+ U32 header_version;
+
+ U32 board_mfg;
+ //netxen_brdid_t board_id;
+ U32 board_type;
+ U32 board_num;
+ //netxen_chipid_t chip_id;
+ U32 chip_id;
+ U32 chip_minor;
+ U32 chip_major;
+ U32 chip_pkg;
+ U32 chip_lot;
+
+
+ U32 port_mask; /* available niu ports */
+ U32 peg_mask; /* available pegs */
+ U32 icache_ok; /* can we run with icache? */
+ U32 dcache_ok; /* can we run with dcache? */
+ U32 casper_ok;
+
+ //netxen_eth_addr_t mac_address[MAX_PORTS]; /* */
+ U32 mac_addr_lo_0;
+ U32 mac_addr_lo_1;
+ U32 mac_addr_lo_2;
+ U32 mac_addr_lo_3;
+
+ /* MN-related config */
+ U32 mn_sync_mode; /* enable/ sync shift cclk/ sync shift mclk */
+ U32 mn_sync_shift_cclk;
+ U32 mn_sync_shift_mclk;
+ U32 mn_wb_en;
+ U32 mn_crystal_freq; /* in MHz */
+ U32 mn_speed; /* in MHz */
+ U32 mn_org;
+ U32 mn_depth;
+ U32 mn_ranks_0; /* ranks per slot */
+ U32 mn_ranks_1; /* ranks per slot */
+ U32 mn_rd_latency_0;
+ U32 mn_rd_latency_1;
+ U32 mn_rd_latency_2;
+ U32 mn_rd_latency_3;
+ U32 mn_rd_latency_4;
+ U32 mn_rd_latency_5;
+ U32 mn_rd_latency_6;
+ U32 mn_rd_latency_7;
+ U32 mn_rd_latency_8;
+ U32 mn_dll_val[18];
+ U32 mn_mode_reg; /* See MIU DDR Mode Register */
+ U32 mn_ext_mode_reg; /* See MIU DDR Extended Mode Register */
+ U32 mn_timing_0; /* See MIU Memory Control Timing Rgister */
+ U32 mn_timing_1; /* See MIU Extended Memory Ctrl Timing Register */
+ U32 mn_timing_2; /* See MIU Extended Memory Ctrl Timing2 Register */
+
+ /* SN-related config */
+ U32 sn_sync_mode; /* enable/ sync shift cclk / sync shift mclk */
+ U32 sn_pt_mode; /* pass through mode */
+ U32 sn_ecc_en;
+ U32 sn_wb_en;
+ U32 sn_crystal_freq;
+ U32 sn_speed;
+ U32 sn_org;
+ U32 sn_depth;
+ U32 sn_dll_tap;
+ U32 sn_rd_latency;
+
+ U32 mac_addr_hi_0;
+ U32 mac_addr_hi_1;
+ U32 mac_addr_hi_2;
+ U32 mac_addr_hi_3;
+
+ U32 magic; /* indicates flash has been initialized */
+
+ U32 mn_rdimm;
+ U32 mn_dll_override;
+} netxen_board_info_t;
+
+#define FLASH_SECTOR_START (1)
+#define NUM_FLASH_SECTORS (64)
+#define FLASH_SECTOR_SIZE (64*1024)
+#define FLASH_TOTAL_SIZE (NUM_FLASH_SECTORS*FLASH_SECTOR_SIZE)
+#define FLASH_NUM_PORTS (4)
+
+typedef struct {
+ U32 flash_addr[32];
+} netxen_flash_mac_addr_t;
+
+/* flash user area */
+typedef struct {
+ U8 flash_md5[16];
+ U8 crbinit_md5[16];
+ U8 brdcfg_md5[16];
+ /* bootloader */
+ U32 bootld_version;
+ U32 bootld_size;
+ U8 bootld_md5[16];
+ /* image */
+ U32 image_version;
+ U32 image_size;
+ U8 image_md5[16];
+ /* primary image status */
+ U32 primary_status;
+ U32 secondary_present;
+
+ /* MAC address , 4 ports */
+ netxen_flash_mac_addr_t mac_addr[FLASH_NUM_PORTS];
+
+ /* Any user defined data */
+} netxen_user_info_t;
+
+#define SECONDARY_IMAGE_PRESENT 0xb3b4b5b6
+#define SECONDARY_IMAGE_ABSENT 0xffffffff
+#define PRIMARY_IMAGE_GOOD 0x5a5a5a5a
+#define PRIMARY_IMAGE_BAD 0xffffffff
+
+/* Flash memory map */
+typedef enum {
+ CRBINIT_START = 0, /* Crbinit section */
+ BRDCFG_START = 0x4000, /* board config */
+ INITCODE_START = 0x6000, /* pegtune code */
+ BOOTLD_START = 0x10000, /* bootld */
+ IMAGE_START = 0x42000, /* compressed image */
+ SECONDARY_START = 0x200000, /* backup images */
+ USER_START = 0x3E0000, /* user defined region */
+ FIXED_START = 0x3F0000 /* backup of crbinit */
+} netxen_flash_map_t;
+
+#define FLASH_START (CRBINIT_START)
+#define PRIMARY_START (BOOTLD_START)
+#define FLASH_CRBINIT_SIZE (0x4000)
+#define FLASH_BRDCFG_SIZE
(sizeof(netxen_board_info_t))
+#define FLASH_USER_SIZE
(sizeof(netxen_user_info_t)/sizeof(uint32_t))
+#define FLASH_SECONDARY_SIZE (USER_START-SECONDARY_START)
+#define NUM_PRIMARY_SECTORS (0x20)
+#define NUM_CONFIG_SECTORS (1)
+
+#endif
diff -Naru linux-2.6.16_orig/drivers/net/netxen/netxen_nic_ioctl.h
linux-2.6.16/drivers/net/netxen/netxen_nic_ioctl.h
--- linux-2.6.16_orig/drivers/net/netxen/netxen_nic_ioctl.h 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/netxen_nic_ioctl.h 2006-03-24
14:13:57.000000000 -0800
@@ -0,0 +1,222 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+#ifndef __NetXen_NIC_IOCTL_H__
+#define __NetXen_NIC_IOCTL_H__
+
+#include <linux/sockios.h>
+
+/* ioctl's dealing with PCI read/writes */
+#define NetXen_CMD_START SIOCDEVPRIVATE
+#define NetXen_NIC_CMD (NetXen_CMD_START + 1)
+#define NetXen_NIC_NAME (NetXen_CMD_START + 2)
+#define NetXen_NIC_SEND_TEST (NetXen_CMD_START + 3)
+#define NetXen_NIC_IRQ_TEST (NetXen_CMD_START + 5)
+#define NetXen_NIC_ILB_TEST (NetXen_CMD_START + 6)
+#define NetXen_NIC_ELB_TEST (NetXen_CMD_START + 7)
+#define NetXen_NIC_LINK_TEST (NetXen_CMD_START + 8)
+#define NetXen_NIC_HW_TEST (NetXen_CMD_START + 9)
+#define NetXen_NIC_CIS_TEST (NetXen_CMD_START + 10)
+#define NetXen_NIC_CR_TEST (NetXen_CMD_START + 11)
+
+/* Error codes - loopback test */
+enum {
+ LB_TEST_OK,
+ LB_UCOPY_PARAM_ERR,
+ LB_UCOPY_DATA_ERR,
+ LB_NOMEM_ERR,
+ LB_TX_NOSKB_ERR,
+ LB_SHORT_DATA_ERR,
+ LB_SEQUENCE_ERR,
+ LB_DATA_ERR,
+ LB_ERRCNT
+};
+
+/* Error codes - CR test */
+enum {
+ CR_TEST_OK,
+ CR_NIU_MODE,
+ CR_PHY,
+ CR_ERRCNT
+};
+
+/* Error codes - CIS test */
+enum {
+ CIS_TEST_OK,
+ CIS_WMARK,
+ CIS_ERRCNT
+};
+
+/* Error codes - HW test */
+enum {
+ HW_TEST_OK,
+ HW_DMA_BZ_0,
+ HW_DMA_BZ_1,
+ HW_DMA_BZ_2,
+ HW_DMA_BZ_3,
+ HW_SRE_PBI_HALT,
+ HW_SRE_L1IPQ,
+ HW_SRE_L2IFQ,
+ HW_SRE_FREEBUF,
+ HW_IPQ,
+ HW_PQ_W_PAUSE,
+ HW_PQ_W_FULL,
+ HW_IFQ_W_PAUSE,
+ HW_IFQ_W_FULL,
+ HW_MEN_BP_TOUT,
+ HW_DOWN_BP_TOUT,
+ HW_FBUFF_POOL_WM,
+ HW_PBUF_ERR,
+ HW_FM_MSG_HDR,
+ HW_FM_MSG,
+ HW_EPG_CTRL_Q,
+ HW_EPG_MSG_BUF,
+ HW_EPG_QREAD_TOUT,
+ HW_EPG_QWRITE_TOUT,
+ HW_EPG_CQ_W_FULL,
+ HW_EPG_MSG_CHKSM,
+ HW_EPG_MTLQ_TOUT,
+ HW_PEG0,
+ HW_PEG1,
+ HW_PEG2,
+ HW_PEG3,
+ HW_ERRCNT
+};
+
+
+
+
+struct sections
+{
+
+ long long is_bss_flag;
+ long long file_offset;
+ long long size;
+ long long load_offset;
+};
+struct driverimg_header
+{
+ long long no_of_sections;
+ struct sections sec[1];
+};
+
+typedef enum {
+ netxen_nic_cmd_none = 0,
+ netxen_nic_cmd_pci_read,
+ netxen_nic_cmd_pci_write,
+ netxen_nic_cmd_pci_mem_read,
+ netxen_nic_cmd_pci_mem_write,
+ netxen_nic_cmd_pci_config_read,
+ netxen_nic_cmd_pci_config_write,
+ netxen_nic_cmd_get_stats,
+ netxen_nic_cmd_clear_stats,
+ netxen_nic_cmd_get_version
+} netxen_nic_ioctl_cmd_t;
+
+typedef struct {
+ __uint32_t cmd;
+ __uint32_t unused1;
+ __uint64_t off;
+ __uint32_t size;
+ __uint32_t rv;
+ char u[64];
+ void *ptr;
+} netxen_nic_ioctl_data_t;
+
+/* FIXME vijo, not used for now */
+/* ioctl's dealing w. interrupt counts */
+#define NetXen_INTR_CMD 3
+typedef enum {
+ netxen_intr_cmd_none = 0,
+ netxen_intr_cmd_clear,
+ netxen_intr_cmd_get
+} netxen_intr_cmd_t;
+
+typedef enum {
+ netxen_intr_src_unspecified = -1,
+ netxen_intr_src_min = 0,
+ netxen_intr_src_dma_0 = 0,
+ netxen_intr_src_dma_1 = 1,
+ netxen_intr_src_i2q = 2,
+ netxen_intr_src_max = 3
+} netxen_intr_src_t;
+
+typedef struct {
+ netxen_intr_cmd_t cmd;
+ netxen_intr_src_t int_src;
+ int data;
+} netxen_intr_data_t;
+
+typedef enum {
+ NetXen_TX_START = 1,
+ NetXen_TX_STOP,
+ NetXen_TX_SET_PARAM,
+ NetXen_TX_SET_PACKET,
+ NetXen_LOOPBACK_START,
+ NetXen_LOOPBACK_STOP
+} netxen_send_test_cmd_t;
+
+typedef struct {
+ netxen_send_test_cmd_t cmd;
+ unsigned int ifg;
+ unsigned int count;
+} netxen_send_test_t;
+
+ /*
+ * Commands to be used for the IP Filter.
+ */
+enum {
+ NetXen_IP_ADDR_CLEAR = 1,
+ NetXen_IP_ADDR_ADD,
+ NetXen_IP_ADDR_DEL,
+ NetXen_IP_ADDR_SHOW
+};
+
+#define NetXen_IP_ADDR_MAX_COUNT 15
+typedef struct {
+ __int32_t count;
+ __uint32_t ip_addr[NetXen_IP_ADDR_MAX_COUNT];
+} netxen_ip_addr_filter_t;
+
+typedef struct {
+ int cmd; /* must be one of the commands above */
+ netxen_ip_addr_filter_t request;
+} netxen_ip_filter_request_t;
+
+struct netxen_statistics {
+ __uint64_t rx_packets;
+ __uint64_t tx_packets;
+ __uint64_t rx_bytes;
+ __uint64_t rx_errors;
+ __uint64_t tx_bytes;
+ __uint64_t tx_errors;
+ __uint64_t rx_CRC_errors;
+ __uint64_t rx_short_length_error;
+ __uint64_t rx_long_length_error;
+ __uint64_t rx_MAC_errors;
+};
+#endif
diff -Naru linux-2.6.16_orig/drivers/net/netxen/netxen_version.h
linux-2.6.16/drivers/net/netxen/netxen_version.h
--- linux-2.6.16_orig/drivers/net/netxen/netxen_version.h 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/netxen_version.h 2006-03-24
14:13:57.000000000 -0800
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+#define _NetXen_NIC_BUILD_NO 1
+#define NetXen_NIC_BUILD_NO "1"
+#define NetXen_NIC_FW_VERSION_MAJOR 2
+#define NetXen_NIC_FW_VERSION_MINOR 0
+#define NetXen_NIC_FW_VERSION_SUB 28
+#define NetXen_NIC_FW_VERSIONID "2.0.28"
+#define NetXen_NIC_LINUX_VERSIONID "2.0.28"
+#define _NetXen_NIC_LINUX_MAJOR 2
+#define _NetXen_NIC_LINUX_MINOR 0
+#define _NetXen_NIC_LINUX_SUBVERSION 28
+#define NetXen_NIC_TIMESTAMP "Thu Mar 23 01:25:36 PST 2006 by build:build"
diff -Naru linux-2.6.16_orig/drivers/net/netxen/nic_cmn.h
linux-2.6.16/drivers/net/netxen/nic_cmn.h
--- linux-2.6.16_orig/drivers/net/netxen/nic_cmn.h 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/nic_cmn.h 2006-03-24 14:13:57.000000000
-0800
@@ -0,0 +1,331 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+/* Header file with definitions for both host and Phantom */
+
+/* $Id: nic_cmn.h,v 1.56.6.3 2006/03/02 08:47:12 adhiraj Exp $ */
+
+#ifndef NetXen_NIC_CMN_H
+#define NetXen_NIC_CMN_H
+
+#include "netxen_nic_config.h"
+
+#if defined(__GCC__)
+#define PREALIGN(X)
+#define POSTALIGN(X) __attribute__ ((aligned(X))
+#else // NOT GCC
+#if !defined (_MSC_VER) //and not windows!
+#define PREALIGN(X)
+#define POSTALIGN(X)
+#endif
+#endif // NOT GCC
+
+#define IP_ALIGNMENT_BYTES 2 /* make ip aligned on 16byteaddr
*/
+#define MAX_RX_BUFFER_LENGTH 2000
+#define MAX_RX_JUMBO_BUFFER_LENGTH 9046
+#define RX_DMA_MAP_LEN (MAX_RX_BUFFER_LENGTH-IP_ALIGNMENT_BYTES)
+#define RX_JUMBO_DMA_MAP_LEN (MAX_RX_JUMBO_BUFFER_LENGTH-IP_ALIGNMENT_BYTES)
+
+/* Opcodes to be used with the commands */
+#define TX_ETHER_PKT 0x01
+/* The following opcodes are for IP checksum */
+#define TX_TCP_PKT 0x02
+#define TX_UDP_PKT 0x03
+#define TX_IP_PKT 0x04
+#define TX_TCP_LSO 0x05
+#define TX_IPSEC 0x06
+#define TX_IPSEC_CMD 0x07
+
+/* The following opcodes are for internal consumption. */
+#define NetXen_CONTROL_OP 0x10
+#define PEGNET_REQUEST 0x11
+
+#define MAX_NUM_CARDS 4
+#define MAX_NUM_PORTS 4 /* Deprecated. donot use this */
+#define MAX_NIU_PORTS MAX_NUM_PORTS
+#define PORT1 0
+#define PORT2 1
+#define PORT3 2
+#define PORT4 3
+
+#define DESC_CHAIN 0xFF /* descriptor command continuation */
+
+#define MAX_BUFFERS_PER_CMD 32
+
+/*
+ * Following are the states of the Phantom. Phantom will set them and
+ * Host will read to check if the fields are correct.
+ */
+#define PHAN_INITIALIZE_START 0xff00
+#define PHAN_INITIALIZE_FAILED 0xffff
+#define PHAN_INITIALIZE_COMPLETE 0xff01
+
+/* Following defines will be used in the status descriptor */
+#define TX_ETHER_PKT_COMPLETE 0xB /* same for both commands */
+
+#define NUM_RCV_DESC_RINGS 2 /* No of Rcv Descriptor contexts */
+
+/* descriptor types */
+#define RCV_DESC_NORMAL 0x01
+#define RCV_DESC_JUMBO 0x02
+#define RCV_DESC_NORMAL_CTXID 0
+#define RCV_DESC_JUMBO_CTXID 1
+
+#define RCV_DESC_TYPE(ID) \
+ ((ID == RCV_DESC_JUMBO_CTXID) ? RCV_DESC_JUMBO : RCV_DESC_NORMAL)
+
+#define MAX_CMD_DESCRIPTORS 1024
+#define MAX_RCV_DESCRIPTORS 32768
+#define MAX_JUMBO_RCV_DESCRIPTORS 4096
+#define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
+#define MAX_JUMBO_RCV_DESC MAX_JUMBO_RCV_DESCRIPTORS
+#define MAX_RCV_DESC MAX_RCV_DESCRIPTORS
+#define MAX_RCVSTATUS_DESC MAX_RCV_DESCRIPTORS
+#define NUM_RCV_DESC (MAX_RCV_DESC+MAX_JUMBO_RCV_DESCRIPTORS)
+
+#define MAX_EPG_DESCRIPTORS MAX_CMD_DESCRIPTORS * 8
+
+#define MIN_TX_COUNT 4096
+#define MIN_RX_COUNT 4096
+
+#define MAX_FRAME_SIZE 0x10000 /* 64K MAX size for LSO */
+
+#define PHAN_PEG_RCV_INITIALIZED 0xff01
+#define PHAN_PEG_RCV_START_INITIALIZE 0xff00
+
+#define get_next_index(index,length) ((((index) + 1) == length)?0:(index) +1)
+
+
+#define get_index_range(index,length,count) ((((index) + (count)) >= length)?
\
+ (((index) + (count))-(length)):((index) + (count)))
+
+
+/*
+ * Following data structures describe the descriptors that will be used.
+ * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only
when
+ * we are doing LSO (above the 1500 size packet) only.
+ * This is an overhead but we need it. Let me know if you have questions.
+ */
+
+/* the size of reference handle been changed to 16 bits to pass the MSS fields
+ for the LSO packet */
+
+#define FLAGS_CHECKSUM_ENABLED 0x01
+#define FLAGS_LSO_ENABLED 0x02
+#define FLAGS_IPSEC_SA_ADD 0x04
+#define FLAGS_IPSEC_SA_DELETE 0x08
+#define FLAGS_VLAN_TAGGED 0x10
+
+
+#ifndef U64
+typedef uint64_t U64;
+typedef uint32_t U32;
+typedef uint16_t U16;
+typedef uint8_t U8;
+#endif
+
+typedef struct PREALIGN(64) cmdDescType0
+{
+ U64 netxen_next; // for fragments handled by Phantom
+ union {
+ struct {
+ U32 AddrLowPart2;
+ U32 AddrHighPart2;
+ };
+ U64 AddrBuffer2;
+ };
+
+ U64 totalLength:24, // Total size of the packet
+ tcpHdrOffset:8, // For LSO only
+ ipHdrOffset:8, // For LSO only
+ numOfBuffers:8, // total number of segments (buffers
+ // for this packet. (could be more than 4)
+ flags:8, // as defined above
+ opcode:8;
+
+ U64 referenceHandle:16, // changed to U16 to add mss
+ mss:16, // passed by NDIS_PACKET for LSO
+ port:4,
+ rsvd1:4,
+ totalHdrLength:8, // LSO only : MAC+IP+TCP Hdr size
+ connID:16; // IPSec offoad only
+
+ union {
+ struct {
+ U32 AddrLowPart3;
+ U32 AddrHighPart3;
+ };
+ U64 AddrBuffer3;
+ };
+
+ union {
+ struct {
+ U32 AddrLowPart1;
+ U32 AddrHighPart1;
+ };
+ U64 AddrBuffer1;
+ };
+
+ U64 buffer1Length:16,
+ buffer2Length:16,
+ buffer3Length:16,
+ buffer4Length:16;
+
+ union {
+ struct {
+ U32 AddrLowPart4;
+ U32 AddrHighPart4;
+ };
+ U64 AddrBuffer4;
+ };
+
+} POSTALIGN(64) cmdDescType0_t;
+
+typedef struct PREALIGN(64) controlCmdDesc
+{
+ U64 opcode:8,
+ cmd:8,
+ count:8, // Number of control elements
+ unused:40; // Unused so far
+ __uint32_t ip_addr[(sizeof(cmdDescType0_t) -
+ sizeof(U64))/sizeof(__uint32_t)];
+} POSTALIGN(64) controlCmdDesc_t;
+
+
+// This type has no reference handle but does have a ConnID as
+// this is specific to TCP Chimney. We do not need referenceHandle
+// as it has no associated buffers and based on completion opcode
+// the miniport driver will be able to handle it.
+
+typedef struct cmdDescType1
+{
+ U32 Unm_msg_hdr_Lo;
+ U32 Unm_msg_hdr_Hi;
+ U8 reserved;
+ U8 numOfBuffers;
+ U8 flags;
+ U8 Opcode;
+ U32 port:4,
+ connID:28;
+ U32 data[12]; //48 bytes of data
+} cmdDescType1_t;
+
+
+/* Note: sizeof(rcvDesc) should always be a mutliple of 2 */
+typedef struct rcvDesc
+{
+ U64 referenceHandle:16,
+ reserved:16,
+ bufferLength:32; // allocated buffer length (usually 2K)
+ U64 AddrBuffer;
+} rcvDesc_t;
+
+
+/* opcode field in statusDesc_t */
+#define RCV_NIC_PKT (0xA)
+#define STATUS_NIC_PKT ((RCV_NIC_PKT) << 12)
+
+/* for status field in statusDesc_t */
+#define STATUS_NEED_CKSUM (1)
+#define STATUS_CKSUM_OK (2)
+
+/* owner bits of statusDesc_t */
+#define STATUS_OWNER_HOST (1ULL)
+#define STATUS_OWNER_PHANTOM (2ULL)
+#define HOST_STATUS_DESC ((STATUS_OWNER_HOST) << 48)
+#define PHANTOM_STATUS_DESC ((STATUS_OWNER_PHANTOM) << 48)
+
+#define NetXen_PROT_IP (1)
+#define NetXen_PROT_UNKNOWN (0)
+
+/* Note: sizeof(statusDesc) should always be a mutliple of 2 */
+typedef struct PREALIGN(8) statusDesc
+{
+ U64 port:4, /* initially to be used but noe now */
+ status:4, /* completion status may not have use */
+ type:4, /* type/index of descriptor ring */
+ opcode:4, /* Completion of receive or transmit */
+ totalLength:16, /* NIC mode...no use yet */
+ referenceHandle:16, /* handle for the associated packet */
+ owner:2, /* Owner of the descriptor */
+ prot:4; /* protocol type for skb (Linux) */
+} POSTALIGN(8) statusDesc_t;
+
+
+/*
+ * Defines for various loop counts. These determine the behaviour of the
+ * system. The classic tradeoff between latency and throughput.
+ */
+
+/*
+ * MAX_DMA_LOOPCOUNT : After how many interations do we start the dma for
+ * the status descriptors.
+ */
+#define MAX_DMA_LOOPCOUNT (32)
+
+/*
+ * MAX_TX_DMA_LOOP_COUNT : After how many interations do we start the dma for
+ * the command descriptors.
+ */
+#define MAX_TX_DMA_LOOP_COUNT 1000
+
+/*
+ * MAX_RCV_BUFS : Max number Rx packets that can be buffered before DMA/INT
+ */
+#define MAX_RCV_BUFS (4096)
+
+/*
+ * MAX_INTR_LOOPCOUNT : After how many iterations do we interrupt the
+ * host ?
+ */
+#define MAX_INTR_LOOPCOUNT (1024)
+
+/*
+ * XMIT_LOOP_THRESHOLD : How many times do we spin before we process the
+ * transmit buffers.
+ */
+#define XMIT_LOOP_THRESHOLD 0x20
+
+/*
+ * XMIT_DESC_THRESHOLD : How many descriptors pending before we process
+ * the descriptors.
+ */
+#define XMIT_DESC_THRESHOLD 0x4
+
+/*
+ * TASKLET_DELAY : Ratio of interrupts to be ignored before scheduling
+ * the tasklet. We want to process the receive interrupts quickly, but can
+ * delay processing the tx interrupts.
+ */
+#define TASKLET_DELAY 4
+
+enum {
+ NetXen_RCV_PEG_0 = 0,
+ NetXen_RCV_PEG_1
+};
+
+#endif
diff -Naru linux-2.6.16_orig/drivers/net/netxen/nic_phan_reg.h
linux-2.6.16/drivers/net/netxen/nic_phan_reg.h
--- linux-2.6.16_orig/drivers/net/netxen/nic_phan_reg.h 1969-12-31
16:00:00.000000000 -0800
+++ linux-2.6.16/drivers/net/netxen/nic_phan_reg.h 2006-03-24
14:13:57.000000000 -0800
@@ -0,0 +1,228 @@
+/*
+ * Copyright (C) 2003 - 2006 NetXen Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
+ * MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.
+ *
+ * Contact Information:
+ * [EMAIL PROTECTED]
+ * NetXen, 3965 Freedom Circle, Fourth Floor,
+ * Santa Clara, CA 95054
+ */
+#ifndef NIC_PHAN_REG_H
+#define NIC_PHAN_REG_H
+
+
+#if defined(__GCC__)
+#define PREALIGN(X)
+#define POSTALIGN(X) __attribute__ ((aligned(X))
+#else // NOT GCC
+#if !defined (_MSC_VER) //and not windows!
+#define PREALIGN(X)
+#define POSTALIGN(X)
+#endif
+#endif // NOT GCC
+
+/* CRB Registers/ or q message done only at initialization time.... */
+
+
+/*
+ * The following 2 are the base adresses for the CRB registers and their
+ * offsets will be added to get addresses for the index addresses.......
+ */
+#define NIC_CRB_BASE_PORT1 NetXen_CAM_RAM(0x200) //20 registers for port 1
+#define NIC_CRB_BASE_PORT2 NetXen_CAM_RAM(0x250) // after 20 registers...
+
+#define NetXen_NIC_REG(X) (NIC_CRB_BASE_PORT1+(X))
+
+/*
+ CrbPort?PhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
+ which can be read by the Phantom host to get producer/consumer indexes from
+ Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
+ registers will be used for the addresses of the ring's shared memory
+ on the Phantom.
+*/
+
+#define CRB_PHAN_CNTRL_LO_OFFSET NetXen_NIC_REG(0x00)
+#define CRB_PHAN_CNTRL_HI_OFFSET NetXen_NIC_REG(0x04)
+
+/* point to the indexes */
+#define CRB_CMD_PRODUCER_OFFSET NetXen_NIC_REG(0x08)
+#define CRB_CMD_CONSUMER_OFFSET NetXen_NIC_REG(0x0c)
+
+/* address of command descriptors in the host memory */
+#define CRB_HOST_CMD_ADDR_HI NetXen_NIC_REG(0x30)
+#define CRB_HOST_CMD_ADDR_LO NetXen_NIC_REG(0x34)
+
+/* The following 4 CRB registers are for doing performance coal */
+#define CRB_CMD_INTR_LOOP NetXen_NIC_REG(0x38)
+#define CRB_CMD_DMA_LOOP NetXen_NIC_REG(0x3c)
+#define CRB_RCV_INTR_LOOP NetXen_NIC_REG(0x40)
+#define CRB_RCV_DMA_LOOP NetXen_NIC_REG(0x44)
+
+/* Needed by the host to find out the state of Phantom's initialization */
+#define CRB_ENABLE_TX_INTR NetXen_NIC_REG(0x4c)
+#define CRB_CMDPEG_STATE NetXen_NIC_REG(0x50)
+#define CRB_CMDPEG_CMDRING NetXen_NIC_REG(0x54)
+
+#define CRB_MMAP_ADDR_0 NetXen_NIC_REG(0x60)
+#define CRB_MMAP_ADDR_1 NetXen_NIC_REG(0x64)
+#define CRB_MMAP_ADDR_2 NetXen_NIC_REG(0x68)
+#define CRB_MMAP_ADDR_3 NetXen_NIC_REG(0x6c)
+
+#define CRB_MMAP_SIZE_0 NetXen_NIC_REG(0x70)
+#define CRB_MMAP_SIZE_1 NetXen_NIC_REG(0x74)
+#define CRB_MMAP_SIZE_2 NetXen_NIC_REG(0x78)
+#define CRB_MMAP_SIZE_3 NetXen_NIC_REG(0x7c)
+
+/* Interrupt coalescing parameters */
+#define CRB_GLOBAL_INT_COAL NetXen_NIC_REG(0x80)
+#define CRB_INT_COAL_MODE NetXen_NIC_REG(0x84)
+#define CRB_MAX_RCV_BUFS NetXen_NIC_REG(0x88)
+#define CRB_TX_INT_THRESHOLD NetXen_NIC_REG(0x8c)
+#define CRB_RX_PKT_TIMER NetXen_NIC_REG(0x90)
+#define CRB_TX_PKT_TIMER NetXen_NIC_REG(0x94)
+#define CRB_RX_PKT_CNT NetXen_NIC_REG(0x98)
+#define CRB_RX_TMR_CNT NetXen_NIC_REG(0x9c)
+
+/* Register for communicating XG link status */
+#define CRB_XG_STATE NetXen_NIC_REG(0xa0)
+
+/* Debug registers for controlling NIC pkt gen agent */
+#define CRB_AGENT_GO NetXen_NIC_REG(0xb0)
+#define CRB_AGENT_TX_SIZE NetXen_NIC_REG(0xb4)
+#define CRB_AGENT_TX_TYPE NetXen_NIC_REG(0xb8)
+#define CRB_AGENT_TX_ADDR NetXen_NIC_REG(0xbc)
+#define CRB_AGENT_TX_MSS NetXen_NIC_REG(0xc0)
+
+/* Debug registers for observing NIC performance */
+#define CRB_TX_STATE NetXen_NIC_REG(0xd0)
+#define CRB_TX_COUNT NetXen_NIC_REG(0xd4)
+#define CRB_RX_STATE NetXen_NIC_REG(0xd8)
+
+/*
+ * Alternative method of getting to the MMAP addr & size.
+ */
+#define CRB_MMAP_ADDR(idx) (CRB_MMAP_ADDR_0 + ((idx) << 2))
+#define CRB_MMAP_SIZE(idx) (CRB_MMAP_SIZE_0 + ((idx) << 2))
+
+/* CRB registers per Rcv Descriptor ring */
+typedef struct {
+ U32 PREALIGN(512) CRB_RCV_PRODUCER_OFFSET POSTALIGN(512);
+ U32 CRB_RCV_CONSUMER_OFFSET;
+
+ U32 CRB_GLOBALRCV_RING;
+} netxen_rcv_desc_crb_t;
+
+/*
+ * CRB registers used by the receive peg logic. One instance of these
+ * needs to be instantiated per instance of the receive peg.
+ */
+
+typedef struct {
+ netxen_rcv_desc_crb_t rcv_desc_crb[NUM_RCV_DESC_RINGS];
+
+ U32 CRB_RCVSTATUS_RING;
+ U32 CRB_RCV_STATUS_PRODUCER;
+ U32 CRB_RCV_STATUS_CONSUMER;
+ U32 CRB_RCVPEG_STATE;
+} netxen_recv_crb_t;
+
+#if defined(DEFINE_GLOBAL_RECV_CRB)
+netxen_recv_crb_t recv_crb_registers[] = {
+ /*
+ * Instance 0.
+ */
+ {
+ //rcv_desc_crb:
+ {
+ {
+ //CRB_RCV_PRODUCER_OFFSET:
+ NetXen_NIC_REG(0x18),
+ //CRB_RCV_CONSUMER_OFFSET:
+ NetXen_NIC_REG(0x1c),
+ //CRB_GLOBALRCV_RING:
+ NetXen_NIC_REG(0x20),
+ },
+ /* Jumbo frames */
+ {
+ //CRB_RCV_PRODUCER_OFFSET:
+ NetXen_NIC_REG(0x100),
+ //CRB_RCV_CONSUMER_OFFSET:
+ NetXen_NIC_REG(0x104),
+ //CRB_GLOBALRCV_RING:
+ NetXen_NIC_REG(0x108),
+ }
+ },
+ //CRB_RCVSTATUS_RING:
+ NetXen_NIC_REG(0x24),
+ //CRB_RCV_STATUS_PRODUCER:
+ NetXen_NIC_REG(0x28),
+ //CRB_RCV_STATUS_CONSUMER:
+ NetXen_NIC_REG(0x2c),
+ //CRB_RCVPEG_STATE:
+ NetXen_NIC_REG(0x48),
+
+ },
+ /*
+ * Instance 1,
+ */
+ {
+ //rcv_desc_crb:
+ {
+ {
+ //CRB_RCV_PRODUCER_OFFSET:
+ NetXen_NIC_REG(0x80),
+ //CRB_RCV_CONSUMER_OFFSET:
+ NetXen_NIC_REG(0x84),
+ //CRB_GLOBALRCV_RING:
+ NetXen_NIC_REG(0x88),
+ },
+ /* Jumbo frames */
+ {
+ //CRB_RCV_PRODUCER_OFFSET:
+ NetXen_NIC_REG(0x10C),
+ //CRB_RCV_CONSUMER_OFFSET:
+ NetXen_NIC_REG(0x110),
+ //CRB_GLOBALRCV_RING:
+ NetXen_NIC_REG(0x114),
+ }
+ },
+ //CRB_RCVSTATUS_RING:
+ NetXen_NIC_REG(0x8c),
+ //CRB_RCV_STATUS_PRODUCER:
+ NetXen_NIC_REG(0x90),
+ //CRB_RCV_STATUS_CONSUMER:
+ NetXen_NIC_REG(0x94),
+ //CRB_RCVPEG_STATE:
+ NetXen_NIC_REG(0x98),
+
+ },
+};
+
+#define NUM_RCV_INSTANCES \
+ (sizeof(recv_crb_registers)/sizeof(recv_crb_registers[0]))
+
+#else
+
+extern netxen_recv_crb_t recv_crb_registers[];
+
+#endif /* DEFINE_GLOBAL_RECEIVE_CRB */
+
+#endif /* NIC_PHAN_REG_H */
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