High Touch / Low Touch

Is this a measure of the amount of fiddle diddling required to get the chip to 
work as documented, or is it some other kind of code?

For example a "High Touch" chip needs lots of fiddle farting because it was 
designed by a moron and every possible thing that can be programmed incorrectly 
is programmed incorrectly, whereas in a "Low Touch" chip all the defaults are 
already set to the most useful and rational setting so that it can be used 
without touching it to fix all the defects?

Perhaps it is a measure of the babysitting required while the chip is running.  
"High Touch" chips require constant attention, nappy changes, positive 
re-inforcement of the settings, etc., while operating because they are 
inherently unreliable and badly designed whereas "Low Touch" chips once set up 
just work and require little ongoing supervision unless you want to change 
something?

Or is it just a strange translation for functionality (as in High End / Low 
End)?


> -----Original Message-----
> From: NANOG [mailto:nanog-boun...@nanog.org] On Behalf Of Saku Ytti
> Sent: Saturday, 23 April, 2016 14:21
> To: Tom Hill
> Cc: nanog list
> Subject: Re: Arista Routing Solutions
>
> On 23 April 2016 at 10:52, Tom Hill <t...@ninjabadger.net> wrote:
> > In broad strokes: for your money you're either getting port density, or
> > more features per port. The only difference here is that there's
> > suddenly more TCAM on the device, and I still don't see the above
> > changing too drastically.
>
> Yeah OP is comparing high touch chip (MX104) to low touch chip
> (Jericho) that is not fair comparison. And cost is what customer is
> willing to pay, regardless of sticker on the box. No one will pay
> significant mark-up for another sticker, I've never seen in RFP
> significant differences in comparable products.
>
> Fairer comparison would be QFX10k, instead of MX104. QFX10k is AFAIK
> only product in this segment which is not using Jericho. If this is
> competitive advantage or risk, jury is still out, I lean towards
> competitive advantage, mainly due to its memory design.
>
> --
>   ++ytti



Reply via email to