On a related note, can we disable HDP flushes and other flushes for
USWC when we don't use write
combining and CPU writes to VRAM? Maybe by adding a per-IB flag that
would instruct the
kernel to flush or not flush HDP?
Marek
On Wed, Aug 5, 2015 at 4:18 AM, Michel Dänzer <mic...@daenzer.net> wrote:
> On 03.08.2015 21:36, Marek Olšák wrote:
>> From: Marek Olšák <marek.ol...@amd.com>
>>
>> ---
>> src/gallium/drivers/radeon/r600_buffer_common.c | 6 ++++--
>> src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
>> src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
>> 3 files changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
>> b/src/gallium/drivers/radeon/r600_buffer_common.c
>> index fc5f6c2..d5ee188 100644
>> --- a/src/gallium/drivers/radeon/r600_buffer_common.c
>> +++ b/src/gallium/drivers/radeon/r600_buffer_common.c
>> @@ -111,7 +111,8 @@ bool r600_init_resource(struct r600_common_screen
>> *rscreen,
>>
>> switch (res->b.b.usage) {
>> case PIPE_USAGE_STREAM:
>> - flags = RADEON_FLAG_GTT_WC;
>> + if (!(rscreen->debug_flags & DBG_NO_WC))
>> + flags = RADEON_FLAG_GTT_WC;
>> /* fall through */
>> case PIPE_USAGE_STAGING:
>> /* Transfers are likely to occur more often with these
>> resources. */
>> @@ -133,7 +134,8 @@ bool r600_init_resource(struct r600_common_screen
>> *rscreen,
>> default:
>> /* Not listing GTT here improves performance in some apps. */
>> res->domains = RADEON_DOMAIN_VRAM;
>> - flags |= RADEON_FLAG_GTT_WC;
>> + if (!(rscreen->debug_flags & DBG_NO_WC))
>> + flags |= RADEON_FLAG_GTT_WC;
>> break;
>> }
>
> I think it would be both simpler and safer to mask out
> RADEON_FLAG_GTT_WC after all the code which sets the various flags.
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
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