On Tue, Jun 23, 2015 at 01:23:05PM -0700, Anuj Phogat wrote: > In case of I915_TILING_{X,Y} we need to pass tiling format to libdrm > using drm_intel_bo_alloc_tiled(). But, In case of YF/YS tiled buffers > libdrm need not know about the tiling format because these buffers > don't have hardware support to be tiled or detiled through a fenced > region. libdrm still need to know buffer alignment value for its use > in kernel when resolving the relocation. > > Using drm_intel_bo_alloc_for_render() for YF/YS tiled buffers > satisfy both the above conditions. > > V2: Delete min/max buffer size restrictions not valid for i965+. > Remove redundant align to tile size statements. > Remove some redundant code now when there are no min/max buffer size. > > Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> > Cc: Ben Widawsky <b...@bwidawsk.net> > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 62 > +++++++++++++++++++++++++-- > 1 file changed, 58 insertions(+), 4 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > index 80c52f2..5bcb094 100644 > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > @@ -558,6 +558,48 @@ intel_lower_compressed_format(struct brw_context *brw, > mesa_format format) > } > } > > +/* This function computes Yf/Ys tiled bo size, alignment and pitch. */ > +static uint64_t > +intel_get_yf_ys_bo_size(struct intel_mipmap_tree *mt, unsigned *alignment, > + uint64_t *pitch) > +{ > + const uint32_t bpp = mt->cpp * 8; > + const uint32_t aspect_ratio = (bpp == 16 || bpp == 64) ? 2 : 1; > + uint32_t tile_width, tile_height; > + uint64_t stride, size, aligned_y; > + > + assert(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE); > + > + *alignment = mt->tr_mode == INTEL_MIPTREE_TRMODE_YF ? 4096 : 64 * 1024; > + > + switch (bpp) { > + case 8: > + tile_height = 64; > + break; > + case 16: > + case 32: > + tile_height = 32; > + break; > + case 64: > + case 128: > + tile_height = 16; > + break; > + default: > + unreachable("not reached"); > + } > + > + if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS) > + tile_height *= 4; > + > + aligned_y = ALIGN(mt->total_height, tile_height); > + stride = mt->total_width * mt->cpp; > + tile_width = tile_height * mt->cpp * aspect_ratio; > + stride = ALIGN(stride, tile_width); > + size = stride * aligned_y; > + > + *pitch = stride; > + return size; > +} > > struct intel_mipmap_tree * > intel_miptree_create(struct brw_context *brw, > @@ -616,11 +658,23 @@ intel_miptree_create(struct brw_context *brw, > alloc_flags |= BO_ALLOC_FOR_RENDER; > > unsigned long pitch; > - mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree", total_width, > - total_height, mt->cpp, &mt->tiling, > - &pitch, alloc_flags); > mt->etc_format = etc_format; > - mt->pitch = pitch; > + > + if (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) { > + unsigned alignment = 0; > + unsigned long size; > + size = intel_get_yf_ys_bo_size(mt, &alignment, &pitch); > + assert(size); > + mt->bo = drm_intel_bo_alloc_for_render(brw->bufmgr, "miptree", > + size, alignment); > + mt->pitch = pitch; > + } else { > + mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree", > + total_width, total_height, mt->cpp, > + &mt->tiling, &pitch, > + alloc_flags); > + mt->pitch = pitch; > + } > > /* If the BO is too large to fit in the aperture, we need to use the > * BLT engine to support it. Prior to Sandybridge, the BLT paths can't >
You could move mt->pitch = pitch outside of the if/else (or get rid of the local variable entirely): Reviewed-by: Ben Widawsky <b...@bwidawsk.net> _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev