If we tell NIR to split ffma's, then we don't need seperate options
anymore.
---
src/mesa/drivers/dri/i965/brw_context.c | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 7cab1c9..3e76210 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -551,12 +551,7 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
}
- static const nir_shader_compiler_options gen4_nir_options = {
- .native_integers = true,
- .lower_ffma = true,
- };
-
- static const nir_shader_compiler_options gen6_nir_options = {
+ static const nir_shader_compiler_options nir_options = {
.native_integers = true,
.lower_ffma = true,
};
@@ -574,10 +569,7 @@ brw_initialize_context_constants(struct brw_context *brw)
(i == MESA_SHADER_FRAGMENT);
ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectUniform = false;
ctx->Const.ShaderCompilerOptions[i].LowerClipDistance = true;
- if (brw->gen >= 6)
- ctx->Const.ShaderCompilerOptions[i].NirOptions = &gen6_nir_options;
- else
- ctx->Const.ShaderCompilerOptions[i].NirOptions = &gen4_nir_options;
+ ctx->Const.ShaderCompilerOptions[i].NirOptions = &nir_options;
}
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
--
2.3.3
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