On 02/11/2015 02:54 PM, Matt Turner wrote:
> total instructions in shared programs: 5932832 -> 5932736 (-0.00%)
> instructions in affected programs: 8184 -> 8088 (-1.17%)
> helped: 52
> HURT: 14
> GAINED: 1
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 14 ++++++++++++++
> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 19 +++++++++++++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index b628bff..17849c7 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -630,6 +630,20 @@ fs_visitor::visit(ir_expression *ir)
>
> /* Deal with the real oddball stuff first */
> switch (ir->operation) {
> + case ir_unop_neg: {
> + if (!ir->type->is_float())
> + break;
> +
> + ir_expression *mul = ir->operands[0]->as_expression();
> + if (mul && mul->operation == ir_binop_mul) {
> + mul->accept(this);
> + fs_inst *mul_inst = (fs_inst *) this->instructions.get_tail();
> + assert(mul_inst->opcode == BRW_OPCODE_MUL);
> +
> + mul_inst->src[1].negate = true;
Are you sure that mul_inst->src[1].negate will be false?
Also, shouldn't this return here? The other cases return when they are
able to generate code for the expression.
> + }
> + break;
> + }
> case ir_binop_add:
> if (brw->gen <= 5 && try_emit_line(ir))
> return;
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> index 5638105..2c21344 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> @@ -1309,6 +1309,25 @@ vec4_visitor::visit(ir_expression *ir)
> src_reg op[Elements(ir->operands)];
> vec4_instruction *inst;
>
> + switch (ir->operation) {
> + case ir_unop_neg: {
> + if (!ir->type->is_float())
> + break;
> +
> + ir_expression *mul = ir->operands[0]->as_expression();
> + if (mul && mul->operation == ir_binop_mul) {
> + mul->accept(this);
> + vec4_instruction *mul_inst = (vec4_instruction *)
> this->instructions.get_tail();
> + assert(mul_inst->opcode == BRW_OPCODE_MUL);
> +
> + mul_inst->src[1].negate = true;
> + }
> + break;
> + }
> + default:
> + break;
> + }
> +
> if (ir->operation == ir_binop_add) {
> if (try_emit_mad(ir))
> return;
>
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