Some instruction bits don't have a mapping defined to any compacted instruction field. If they're ever set and we end up compacting the instruction they will be forced to zero. Avoid using compaction in such cases.
v2: Align multiple lines of an expression to the same column. Change conditional compaction of 3-source instructions to an assertion. (Matt) v3: The 3-source instruction bit 105 is part of SourceIndex on CHV. Add assertion that reserved bit 7 is not set. (Matt) Document overlap with UIP and 64-bit immediate fields. --- src/mesa/drivers/dri/i965/brw_eu_compact.c | 48 ++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c index 8e33bcb..cb93636 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_compact.c +++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c @@ -843,10 +843,54 @@ set_3src_source_index(struct brw_context *brw, brw_compact_inst *dst, brw_inst * } static bool +has_unmapped_bits(struct brw_context *brw, brw_inst *src) +{ + /* Check for instruction bits that don't map to any of the fields of the + * compacted instruction. The instruction cannot be compacted if any of + * them are set. They overlap with: + * - NibCtrl (bit 47 on Gen7, bit 11 on Gen8) + * - Dst.AddrImm[9] (bit 47 on Gen8) + * - Src0.AddrImm[9] (bit 95 on Gen8) + * - Imm64[27:31] (bits 91-95 on Gen7, bit 95 on Gen8) + * - UIP[31] (bit 95 on Gen8) + */ + if (brw->gen >= 8) + return brw_inst_bits(src, 95, 95) || + brw_inst_bits(src, 47, 47) || + brw_inst_bits(src, 11, 11) || + brw_inst_bits(src, 7, 7); + else + return brw_inst_bits(src, 95, 91) || + brw_inst_bits(src, 47, 47) || + brw_inst_bits(src, 7, 7) || + (brw->gen < 7 && brw_inst_bits(src, 90, 90)); +} + +static bool +has_3src_unmapped_bits(struct brw_context *brw, brw_inst *src) +{ + /* Check for three-source instruction bits that don't map to any of the + * fields of the compacted instruction. All of them seem to be reserved + * bits currently. + */ + assert(brw->gen >= 8); + if (brw->gen >= 9 || brw->is_cherryview) + return brw_inst_bits(src, 127, 127) || + brw_inst_bits(src, 7, 7); + else + return brw_inst_bits(src, 127, 126) || + brw_inst_bits(src, 105, 105) || + brw_inst_bits(src, 84, 84) || + brw_inst_bits(src, 36, 35) || + brw_inst_bits(src, 7, 7); +} + +static bool brw_try_compact_3src_instruction(struct brw_context *brw, brw_compact_inst *dst, brw_inst *src) { assert(brw->gen >= 8); + assert(!has_3src_unmapped_bits(brw, src)); #define compact(field) \ brw_compact_inst_set_3src_##field(dst, brw_inst_3src_##field(brw, src)) @@ -914,6 +958,7 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst, brw_compact_inst temp; assert(brw_inst_cmpt_control(brw, src) == 0); + assert(brw_inst_bits(src, 7, 7) == 0); /* reserved bit */ if (is_3src(brw_inst_opcode(brw, src))) { if (brw->gen >= 8) { @@ -937,6 +982,9 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst, return false; } + if (has_unmapped_bits(brw, src)) + return false; + memset(&temp, 0, sizeof(temp)); brw_compact_inst_set_opcode(&temp, brw_inst_opcode(brw, src)); -- 2.1.3 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev