On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez <curroje...@riseup.net> wrote:
> Scalar registers are required to have zero stride, fix the
> regs_written calculation not to assume that the instruction writes
> zero registers in that case.
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 0a82fb7..bafe438 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -126,7 +126,8 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size,
> const fs_reg &dst,
> case HW_REG:
> case MRF:
> case ATTR:
> - this->regs_written = (dst.width * dst.stride * type_sz(dst.type) + 31)
> / 32;
> + this->regs_written =
> + CEILING(MAX2(dst.width * dst.stride, 1) * type_sz(dst.type), 32);
I sent basically the same patch ("[PATCH 06/10] i965/fs: Consider
subregister writes to be writing a register.")
I don't really care which gets committed, but I did have to think a
lot more about yours (and look up what CEILING did) to be sure it did
the same thing. Maybe you like mine better?
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