From: Dave Airlie <airl...@redhat.com>
I've only tested this on IVB so far, but it passes the two piglit tests.
Signed-off-by: Dave Airlie <airl...@redhat.com>
---
src/mesa/drivers/dri/i965/gen6_clip_state.c | 2 +-
src/mesa/drivers/dri/i965/gen7_sf_state.c | 2 +-
src/mesa/drivers/dri/i965/intel_extensions.c | 4 +++-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c
b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index ab08281..bcc0046 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -170,7 +170,7 @@ upload_clip_state(struct brw_context *brw)
OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2));
OUT_BATCH(dw1);
OUT_BATCH(enable |
- GEN6_CLIP_API_OGL |
+ ((ctx->Transform.ClipDepthMode == GL_ZERO_TO_ONE) ?
GEN6_CLIP_API_D3D : GEN6_CLIP_API_OGL) |
GEN6_CLIP_MODE_NORMAL |
GEN6_CLIP_XY_TEST |
dw2);
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c
b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index 150a4d3..3a4b878 100644
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -118,7 +118,7 @@ upload_sf_state(struct brw_context *brw)
dw1 |= (brw_depthbuffer_format(brw) <<
GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
/* _NEW_POLYGON */
- if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
+ if (((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo) ^
(ctx->Transform.ClipOrigin == GL_UPPER_LEFT))
dw1 |= GEN6_SF_WINDING_CCW;
if (ctx->Polygon.OffsetFill)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index bbbb76f..eb3a169 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -330,6 +330,8 @@ intelInitExtensions(struct gl_context *ctx)
if (brw->gen >= 7)
ctx->Extensions.ARB_shader_atomic_counters = true;
- if (brw->gen == 7)
+ if (brw->gen == 7) {
ctx->Extensions.ARB_gpu_shader5 = true;
+ ctx->Extensions.ARB_clip_control = true;
+ }
}
--
1.9.3
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