After modifying the hiz buffer allocation and qpitch calculation, hiz
appears to work in all cases on gen8.
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e959b8c..3148821 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1355,7 +1355,7 @@ intel_miptree_level_enable_hiz(struct brw_context *brw,
{
assert(mt->hiz_buf);
- if (brw->gen >= 8 || brw->is_haswell) {
+ if (brw->is_haswell) {
uint32_t width = minify(mt->physical_width0, level);
uint32_t height = minify(mt->physical_height0, level);
--
2.0.0
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