The hiz buffer doesn't have a documented structure. Nevertheless, we allocate a miptree structure for the hiz buffer. In the past we relied on setting up the surface such that we had to point at an offset within the hiz buffer.
For gen7+ we no longer do this. We now always point the surface to the beginning of the buffer. (For the surface, and for the hiz buffer.) This means that we can now stop allocating a miptree structure for gen7+. This also appears to fix a bug. In allocating the hiz buffer, the gen7 PRM says that the hiz buffer "Qpitch is computed using vertical alignment j=8." With our old strategy of allocating a miptree, we would only use a value of j=4. I suspect that this is what allows the "i965/gen8: Enable hiz for all depth levels" patch to work. No piglit regressions were seen on gen7 or gen8. This series is available in the non-miptree-hiz branch of: git://people.freedesktop.org/~jljusten/mesa Jordan Justen (6): i965/hiz: Start to separate miptree out from hiz buffers i965/gen7: Don't rely directly on the hiz miptree structure i965/gen8: Don't rely directly on the hiz miptree structure i965/gen7: Don't allocate hiz miptree structure i965/gen8: Don't allocate hiz miptree structure i965/gen8: Enable hiz for all depth levels src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 7 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 6 +- src/mesa/drivers/dri/i965/intel_fbo.c | 4 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120 ++++++++++++++++++++++---- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 29 ++++++- 8 files changed, 145 insertions(+), 33 deletions(-) -- 2.0.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
