According to the documentation, we don't need this SINT workaround on
Broadwell. (Or at least, it doesn't mention that we need it.)
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 4c71e41..58e09b7 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -87,9 +87,7 @@ compute_msaa_layout(struct brw_context *brw, mesa_format
format, GLenum target)
* would require converting between CMS and UMS MSAA layouts on the fly,
* which is expensive.
*/
- if (_mesa_get_format_datatype(format) == GL_INT) {
- /* TODO: is this workaround needed for future chipsets? */
- assert(brw->gen == 7);
+ if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) {
return INTEL_MSAA_LAYOUT_UMS;
} else {
return INTEL_MSAA_LAYOUT_CMS;
--
2.0.0
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