On Fri, May 30, 2014 at 11:31 AM, Bruno Jiménez <brunoji...@gmail.com> wrote:
> The data has been extracted from:
> AMD Accelerated Parallel Processing OpenCL Programming Guide (rev 2.7)
> Appendix D: Device Parameters
You should add a query for the number of compute units to the
RADEON_INFO ioctl and then just ask the kernel how many CUs/SIMDs the
hw has. This will properly handle all boards (harvest, etc.) since we
can read the actual number of CUs off the GPU.
Alex
> ---
> src/gallium/drivers/radeon/r600_pipe_common.c | 90
> +++++++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
> b/src/gallium/drivers/radeon/r600_pipe_common.c
> index 70c4d1a..c4abacd 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.c
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
> @@ -422,6 +422,89 @@ const char *r600_get_llvm_processor_name(enum
> radeon_family family)
> }
> }
>
> +static uint32_t radeon_max_compute_units(enum radeon_family family)
> +{
> + switch (family) {
> + case CHIP_CEDAR:
> + return 2;
> +
> + /* Redwood PRO2: 4
> + * Redwood PRO: 5
> + * Redwood XT: 5 */
> + case CHIP_REDWOOD:
> + return 4;
> +
> + /* Juniper LE: 9
> + * Juniper XT: 10 */
> + case CHIP_JUNIPER:
> + return 9;
> +
> + /* Cypress LE: 14
> + * Cypress PRO: 18
> + * Cypress XT: 20 */
> + case CHIP_CYPRESS:
> + return 14;
> +
> + case CHIP_HEMLOCK:
> + return 40;
> +
> + /* XXX: is Zacate really equal to Ontario?
> + * Zacate E-350: 2
> + * Zacate E-240: 2
> + * Ontario C-50: 2
> + * Ontario C-30: 2 */
> + case CHIP_PALM:
> + return 2;
> +
> + /* Caicos: 2
> + * Seymour LP: 2
> + * Seymour PRO: 2
> + * Seymour XT: 2
> + * Seymour XTX: 2 */
> + case CHIP_CAICOS:
> + return 2;
> +
> + /* Turks PRO: 6
> + * Turks XT: 6
> + * Whistler LP: 6
> + * Whistler PRO: 6
> + * Whistler XT: 6 */
> + case CHIP_TURKS:
> + return 6;
> +
> + /* Barts LE: 10
> + * Barts PRO: 12
> + * Barts XT: 14
> + * Blackcomb PRO: 12 */
> + case CHIP_BARTS:
> + return 10;
> +
> + /* Cayman PRO: 22
> + * Cayman XT: 24
> + * Cayman Gemini: 48 */
> + case CHIP_CAYMAN:
> + return 22;
> +
> + /* Verde PRO: 8
> + * Verde XT: 10 */
> + case CHIP_VERDE:
> + return 8;
> +
> + /* Pitcairn PRO: 16
> + * Pitcairn XT: 20 */
> + case CHIP_PITCAIRN:
> + return 16;
> +
> + /* Tahiti PRO: 28
> + * Tahiti XT: 32 */
> + case CHIP_TAHITI:
> + return 28;
> +
> + default:
> + return 1;
> + }
> +}
> +
> static int r600_get_compute_param(struct pipe_screen *screen,
> enum pipe_compute_cap param,
> void *ret)
> @@ -519,6 +602,13 @@ static int r600_get_compute_param(struct pipe_screen
> *screen,
> }
> return sizeof(uint32_t);
>
> + case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
> + if (ret) {
> + uint32_t *max_compute_units = ret;
> + *max_compute_units =
> radeon_max_compute_units(rscreen->family);
> + }
> + return sizeof(uint32_t);
> +
> default:
> fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
> return 0;
> --
> 1.9.3
>
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