The goal for this series was to allow layered rendering to work with
gen6. It also fixes 10 piglit tests, and a performance regression bug
(https://bugs.freedesktop.org/show_bug.cgi?id=56127).
This series is available on my gen6-layered branch in
git://people.freedesktop.org/~jljusten/mesa
I ran piglit's quick suite on gen6 and gm45:
gen6: 10 fixes, 0 regressions
gm45: no changes
The last five patches in the series are a bit hackish, but I had
trouble finding a better looking solution that also kept stencil & hiz
happy. (These patches are the RFC part :)
Jordan Justen (16):
i965: Split gen6 renderbuffer surface state from gen5 and older
i965/gen6: add support for layered renderbuffers
i965/gen6: Align height to 2 with MSAA for certain surface heights
i965: Split gen6 depth state out from brw
i965/gen6 depth surface: calculate more specific surface type
i965/gen6 depth surface: calculate depth (array size) for depth
surface
i965/gen6 depth surface: calculate LOD being rendered to
i965/gen6 depth surface: calculate minimum array element being
rendered
i965/gen6 blorp depth: calculate base surface width/height
i965/gen6 fbo: make unmatched depth/stencil configs return unsupported
i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of
surface
i965: Allow forcing a LOD0 spacing miptree layout
i965: Support array_spacing_lod0 for multiple miplevels
i965/gen6: Stencil/hiz needs an offset for LOD > 0
i965/gen6: Force W tiling alignment with array_spacing_lod0
i965/gen6: Force array_spacing_lod0 for stencil/hiz
src/mesa/drivers/dri/i965/Makefile.sources | 2 +
src/mesa/drivers/dri/i965/brw_context.c | 4 +
src/mesa/drivers/dri/i965/brw_context.h | 13 +
src/mesa/drivers/dri/i965/brw_defines.h | 2 +
src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +-
src/mesa/drivers/dri/i965/brw_state.h | 4 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
src/mesa/drivers/dri/i965/brw_tex_layout.c | 37 ++-
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 115 ++++----
src/mesa/drivers/dri/i965/gen6_depth_state.c | 368 +++++++++++++++++++++++++
src/mesa/drivers/dri/i965/gen6_surface_state.c | 157 +++++++++++
src/mesa/drivers/dri/i965/intel_fbo.c | 7 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 33 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +-
src/mesa/drivers/dri/i965/intel_tex.c | 3 +-
src/mesa/drivers/dri/i965/intel_tex_image.c | 3 +-
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 3 +-
src/mesa/drivers/dri/i965/intel_tex_validate.c | 3 +-
18 files changed, 691 insertions(+), 75 deletions(-)
create mode 100644 src/mesa/drivers/dri/i965/gen6_depth_state.c
create mode 100644 src/mesa/drivers/dri/i965/gen6_surface_state.c
--
2.0.0.rc4
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