Largely cut and paste from Gen7; it works the same way.
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/mesa/drivers/dri/i965/brw_fs.h | 4 ++++
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 29 ++++++++++++++++++++++++-
2 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index b5fb0eb..99c6298 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -704,6 +704,10 @@ private:
struct brw_reg index,
struct brw_reg offset);
void generate_mov_dispatch_to_flags(fs_inst *ir);
+ void generate_set_sample_id(fs_inst *ir,
+ struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1);
void generate_set_simd4x2_offset(fs_inst *ir,
struct brw_reg dst,
struct brw_reg offset);
diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index e19d960..0078228 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -698,6 +698,33 @@ gen8_fs_generator::generate_set_simd4x2_offset(fs_inst *ir,
}
/**
+ * Do a special ADD with vstride=1, width=4, hstride=0 for src1.
+ */
+void
+gen8_fs_generator::generate_set_sample_id(fs_inst *ir,
+ struct brw_reg dst,
+ struct brw_reg src0,
+ struct brw_reg src1)
+{
+ assert(dst.type == BRW_REGISTER_TYPE_D || dst.type == BRW_REGISTER_TYPE_UD);
+ assert(src0.type == BRW_REGISTER_TYPE_D || src0.type ==
BRW_REGISTER_TYPE_UD);
+
+ struct brw_reg reg = retype(stride(src1, 1, 4, 0), BRW_REGISTER_TYPE_UW);
+
+ unsigned save_exec_size = default_state.exec_size;
+ default_state.exec_size = BRW_EXECUTE_8;
+
+ gen8_instruction *add = ADD(dst, src0, reg);
+ gen8_set_mask_control(add, BRW_MASK_DISABLE);
+ if (dispatch_width == 16) {
+ add = ADD(offset(dst, 1), offset(src0, 1), suboffset(reg, 2));
+ gen8_set_mask_control(add, BRW_MASK_DISABLE);
+ }
+
+ default_state.exec_size = save_exec_size;
+}
+
+/**
* Change the register's data type from UD to HF, doubling the strides in order
* to compensate for halving the data type width.
*/
@@ -1148,7 +1175,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
break;
case FS_OPCODE_SET_SAMPLE_ID:
- assert(!"XXX: Missing Gen8 scalar support for SET_SAMPLE_ID");
+ generate_set_sample_id(ir, dst, src[0], src[1]);
break;
case FS_OPCODE_PACK_HALF_2x16_SPLIT:
--
1.8.4.2
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