Signed-off-by: Chris Forbes <chr...@ijw.co.nz>
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/brw_structs.h | 21 +++++++++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index e64d638..7d8f927 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1087,6 +1087,7 @@ enum brw_message_target {
GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9,
GEN7_SFID_DATAPORT_DATA_CACHE = 10,
+ GEN7_SFID_PIXEL_INTERPOLATOR = 11,
HSW_SFID_DATAPORT_DATA_CACHE_1 = 12,
};
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h
b/src/mesa/drivers/dri/i965/brw_structs.h
index e1ba5f8..a65d793 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1377,6 +1377,27 @@ struct brw_instruction
GLuint pad2:2;
GLuint end_of_thread:1;
} gen7_dp;
+
+ /**
+ * Message for the Gen7 Pixel Interpolator.
+ *
+ * Defined in the Ivybridge PRM, Volume 4 Part 2,
+ * section 4.1.1.1.
+ */
+ struct {
+ GLuint msg_data:8;
+ GLuint pad1:3;
+ GLuint slot_group:1;
+ GLuint msg_type:2;
+ GLuint interpolation_mode:1;
+ GLuint pad2:1;
+ GLuint simd_mode:1;
+ GLuint pad3:1;
+ GLuint response_length:5;
+ GLuint msg_length:4;
+ GLuint pad4:2;
+ GLuint end_of_thread:1;
+ } gen7_pi;
/** @} */
struct {
--
1.8.4.2
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