Since src_offset was always 0, it wasn't doing anything for us beyond
intel_bufferobj_buffer().
---
src/mesa/drivers/dri/i965/brw_draw_upload.c | 14 ++++----------
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 15 ++-------------
src/mesa/drivers/dri/i965/intel_buffer_objects.h | 5 -----
src/mesa/drivers/dri/i965/intel_tex_image.c | 4 ++--
4 files changed, 8 insertions(+), 30 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c
b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 390b4a3..e85ad69 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -472,11 +472,9 @@ static void brw_prepare_vertices(struct brw_context *brw)
struct brw_vertex_buffer *buffer = &brw->vb.buffers[j];
/* Named buffer object: Just reference its contents directly. */
- buffer->bo = intel_bufferobj_source(brw,
- intel_buffer, 1,
- &buffer->offset);
+ buffer->bo = intel_bufferobj_buffer(brw, intel_buffer, INTEL_READ);
drm_intel_bo_reference(buffer->bo);
- buffer->offset += (uintptr_t)glarray->Ptr;
+ buffer->offset = (uintptr_t)glarray->Ptr;
buffer->stride = glarray->StrideB;
buffer->step_rate = glarray->InstanceDivisor;
@@ -851,13 +849,9 @@ static void brw_upload_indices(struct brw_context *brw)
*/
brw->ib.start_vertex_offset = offset / ib_type_size;
- bo = intel_bufferobj_source(brw,
- intel_buffer_object(bufferobj),
- ib_type_size,
- &offset);
+ bo = intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
+ INTEL_READ);
drm_intel_bo_reference(bo);
-
- brw->ib.start_vertex_offset += offset / ib_type_size;
}
}
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 21d3727..5f6b904 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -62,7 +62,6 @@ release_buffer(struct intel_buffer_object *intel_obj)
{
drm_intel_bo_unreference(intel_obj->buffer);
intel_obj->buffer = NULL;
- intel_obj->offset = 0;
}
/**
@@ -441,15 +440,6 @@ intel_bufferobj_buffer(struct brw_context *brw,
return intel_obj->buffer;
}
-drm_intel_bo *
-intel_bufferobj_source(struct brw_context *brw,
- struct intel_buffer_object *intel_obj,
- GLuint align, GLuint *offset)
-{
- *offset = intel_obj->offset;
- return intel_obj->buffer;
-}
-
/**
* The CopyBufferSubData() driver hook.
*
@@ -468,17 +458,16 @@ intel_bufferobj_copy_subdata(struct gl_context *ctx,
struct intel_buffer_object *intel_src = intel_buffer_object(src);
struct intel_buffer_object *intel_dst = intel_buffer_object(dst);
drm_intel_bo *src_bo, *dst_bo;
- GLuint src_offset;
if (size == 0)
return;
dst_bo = intel_bufferobj_buffer(brw, intel_dst, INTEL_WRITE_PART);
- src_bo = intel_bufferobj_source(brw, intel_src, 64, &src_offset);
+ src_bo = intel_bufferobj_buffer(brw, intel_src, INTEL_READ);
intel_emit_linear_blit(brw,
dst_bo, write_offset,
- src_bo, read_offset + src_offset, size);
+ src_bo, read_offset, size);
/* Since we've emitted some blits to buffers that will (likely) be used
* in rendering operations in other cache domains in this batch, emit a
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.h
b/src/mesa/drivers/dri/i965/intel_buffer_objects.h
index 9a36fd3..cf01e2d 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.h
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.h
@@ -41,7 +41,6 @@ struct intel_buffer_object
{
struct gl_buffer_object Base;
drm_intel_bo *buffer; /* the low-level buffer manager's buffer handle */
- GLuint offset; /* any offset into that buffer */
drm_intel_bo *range_map_bo;
void *range_map_buffer;
@@ -54,10 +53,6 @@ struct intel_buffer_object
drm_intel_bo *intel_bufferobj_buffer(struct brw_context *brw,
struct intel_buffer_object *obj,
GLuint flag);
-drm_intel_bo *intel_bufferobj_source(struct brw_context *brw,
- struct intel_buffer_object *obj,
- GLuint align,
- GLuint *offset);
void intel_upload_data(struct brw_context *brw,
const void *ptr, GLuint size, GLuint align,
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 16fed95..c5d99e1 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -126,9 +126,9 @@ try_pbo_upload(struct gl_context *ctx,
return false;
}
- src_buffer = intel_bufferobj_source(brw, pbo, 64, &src_offset);
+ src_buffer = intel_bufferobj_buffer(brw, pbo, INTEL_READ);
/* note: potential 64-bit ptr to 32-bit int cast */
- src_offset += (GLuint) (unsigned long) pixels;
+ src_offset = (GLuint) (unsigned long) pixels;
int src_stride =
_mesa_image_row_stride(unpack, image->Width, format, type);
--
1.8.4.rc3
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