From: Ville Syrjälä <ville.syrj...@linux.intel.com>
Just spotted these unpopulated MOCS fields when comparing the code
against BSpec. Set the MOCS to the same as everywhere else in Haswell:
L3-cacheable.
v2: Annotate state packet fields (chadv).
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Chad Versace <chad.vers...@linux.intel.com>
---
Ville, I added comments to explain what new fields get set. If this looks
good to you, then I'll commit it.
src/mesa/drivers/dri/i965/brw_misc_state.c | 7 +++++--
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 7 ++++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 3bf37b9..9854e26 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -1038,13 +1038,16 @@ static void upload_state_base_address( struct
brw_context *brw )
*/
if (brw->gen >= 6) {
+ uint8_t mocs = brw->is_haswell ? GEN7_MOCS_L3 : 0;
+
if (brw->gen == 6)
intel_emit_post_sync_nonzero_flush(brw);
BEGIN_BATCH(10);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2));
- /* General state base address: stateless DP read/write requests */
- OUT_BATCH(1);
+ OUT_BATCH(mocs << 8 | /* General State Memory Object Control State */
+ mocs << 4 | /* Stateless Data Port Access Memory Object
Control State */
+ 1); /* General State Base Address Modif Enable */
/* Surface state base address:
* BINDING_TABLE_STATE
* SURFACE_STATE
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index a4a9081..b82323d 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -74,9 +74,14 @@ void
gen6_blorp_emit_state_base_address(struct brw_context *brw,
const brw_blorp_params *params)
{
+ uint8_t mocs = brw->is_haswell ? GEN7_MOCS_L3 : 0;
+
BEGIN_BATCH(10);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2));
- OUT_BATCH(1); /* GeneralStateBaseAddressModifyEnable */
+ OUT_BATCH(mocs << 8 | /* GeneralStateMemoryObjectControlState */
+ mocs << 4 | /* StatelessDataPortAccessMemoryObjectControlState */
+ 1); /* GeneralStateBaseAddressModifEnable */
+
/* SurfaceStateBaseAddress */
OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_SAMPLER, 0, 1);
/* DynamicStateBaseAddress */
--
1.8.3.1
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