Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
src/mesa/drivers/dri/i965/intel_reg.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_reg.h
b/src/mesa/drivers/dri/i965/intel_reg.h
index f45a8f3..2cf68dd 100644
--- a/src/mesa/drivers/dri/i965/intel_reg.h
+++ b/src/mesa/drivers/dri/i965/intel_reg.h
@@ -44,6 +44,10 @@
#define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23))
# define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22)
+/* Haswell RS control */
+#define MI_RS_CONTROL (CMD_MI | (0x6 << 23))
+#define MI_RS_STORE_DATA_IMM (CMD_MI | (0x2b << 23))
+
/** @{
*
* PIPE_CONTROL operation, a combination MI_FLUSH and register write with
--
1.7.9.5
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