On 05/24/2013 01:56 PM, Eric Anholt wrote:
If the hw is pre-gen5 and can't blit depth, it'll cleanly error out.
Did you mean pre-gen6? If I read the code correctly, it is this snippet in
intelEmitCopyBlit
that is responsible for cleanly erroring out.
if (dst_tiling != I915_TILING_NONE) {
if (dst_offset & 4095)
return false;
if (dst_tiling == I915_TILING_Y && intel->gen < 6)
return false;
}
if (src_tiling != I915_TILING_NONE) {
if (src_offset & 4095)
return false;
if (src_tiling == I915_TILING_Y && intel->gen < 6)
return false;
}
---
src/mesa/drivers/dri/intel/intel_tex_copy.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c
b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 7a38082..94e90da 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -96,11 +96,6 @@ intel_copy_texsubimage(struct intel_context *intel,
return false;
}
- /* The blitter can't handle Y-tiled buffers. */
- if (intelImage->mt->region->tiling == I915_TILING_Y) {
- return false;
- }
-
/* blit from src buffer to texture */
if (!intel_miptree_blit(intel,
irb->mt, irb->mt_level, irb->mt_layer,
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