V2:
- Split patch 2/3 in to two:
intel: Change the register type from UW to UD in blorp engine
intel: Add multisample scaled blitting in blorp engine
- Modify src texture coordinates clipping to account for scaling.
- Code rewrite to avoid unwanted changes.
Anuj Phogat (4):
mesa: Implement ext_framebuffer_multisample_blit_scaled extension
intel: Change the register type from UW to UD in blorp engine
intel: Add multisample scaled blitting in blorp engine
i965: Enable ext_framebuffer_multisample_blit_scaled on intel h/w
src/mesa/drivers/dri/i965/brw_blorp.h | 34 ++--
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 223 ++++++++++++++++---------
src/mesa/drivers/dri/intel/intel_extensions.c | 1 +
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 +
src/mesa/main/extensions.c | 1 +
src/mesa/main/fbobject.c | 30 +++-
src/mesa/main/mtypes.h | 1 +
7 files changed, 194 insertions(+), 98 deletions(-)
--
1.8.1.4
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