There exist alignment restrictions for the rectangle primitive emitted
during hiz operations. This patch pads the miptree to prevent a correctly
aligned rectangle from writing to out-of-bounds memory.
We do not currently emit a correctly aligned rectangle, though. That
arrives in a later patch.
Signed-off-by: Chad Versace <chad.vers...@linux.intel.com>
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 633e598..aea42e8 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -189,6 +189,24 @@ brw_miptree_layout(struct intel_context *intel, struct
intel_mipmap_tree *mt)
/* Align to the size of a W tile, 64x64. */
mt->total_width = ALIGN(mt->total_width, 64);
mt->total_height = ALIGN(mt->total_height, 64);
+ } else if (intel->vtbl.is_hiz_depth_format(intel, mt->format)) {
+ /* There exists alignment restrictions for the rectangle primitive
+ * emitted during hiz operations. Pad the miptree to prevent the
+ * rectangle from writing to out-of-bounds memory.
+ *
+ * From the Ivybridge PRM, Vol 2 Part 1 Section 11.5.3.1 Depth Buffer
+ * Clear:
+ *
+ * If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
+ * aligned to an 8x4 pixel block relative to the upper left corner
+ * of the depth buffer, and contain an integer number of these pixel
+ * blocks, and all 8x4 pixels must be lit.
+ *
+ * The PRM continues by saying that, for 4 samples, the rectangle must
+ * be aligned to 4x2 pixels. For 8 samples, 2x2 pixels.
+ */
+ mt->total_width = ALIGN(mt->total_width, 8);
+ mt->total_height = ALIGN(mt->total_height, 4);
}
DBG("%s: %dx%dx%d\n", __FUNCTION__,
--
1.8.1.2
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
