[Mesa-dev] [PATCH 2/3] radeon/llvm: Cayman uses vector instruction for SIN/COS/RECIP_CLAMPED/RECIPSQRT_IEEE

[Vincent Lejeune]

---
 lib/Target/AMDGPU/R600Instructions.td | 34 +++++++++++++++++++---------------
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/lib/Target/AMDGPU/R600Instructions.td 
b/lib/Target/AMDGPU/R600Instructions.td
index da32329..cb44e6e 100644
--- a/lib/Target/AMDGPU/R600Instructions.td
+++ b/lib/Target/AMDGPU/R600Instructions.td
@@ -817,18 +817,11 @@ class MULLO_UINT_Common <bits<11> inst> : R600_2OP <
   []
 >;
 
-class RECIP_CLAMPED_Common <bits<11> inst> : R600_1OP <
-  inst, "RECIP_CLAMPED",
-  []
->;
-
 class RECIP_UINT_Common <bits<11> inst> : R600_1OP <
   inst, "RECIP_INT $dst, $src",
   [(set R600_Reg32:$dst, (AMDGPUurecip R600_Reg32:$src))]
 >;
 
-let FlagOperandIdx = 3 in {
-
 class RECIP_IEEE_Common <bits<11> inst> : R600_1OP <
   inst, "RECIP_IEEE",
   [(set R600_Reg32:$dst, (int_AMDGPU_rcp R600_Reg32:$src))]
@@ -839,7 +832,10 @@ class RECIPSQRT_CLAMPED_Common <bits<11> inst> : R600_1OP <
   [(set R600_Reg32:$dst, (int_AMDGPU_rsq R600_Reg32:$src))]
 >;
 
-} // End let FlagOperandIdx = 3
+class RECIP_CLAMPED_Common <bits<11> inst> : R600_1OP <
+  inst, "RECIP_CLAMPED",
+  []
+>;
 
 class RECIPSQRT_IEEE_Common <bits<11> inst> : R600_1OP <
   inst, "RECIPSQRT_IEEE",
@@ -966,6 +962,13 @@ def RECIP_UINT_eg : RECIP_UINT_Common<0x94>;
 def RECIPSQRT_CLAMPED_eg : RECIPSQRT_CLAMPED_Common<0x87>;
 def EXP_IEEE_eg : EXP_IEEE_Common<0x81>;
 def LOG_IEEE_eg : LOG_IEEE_Common<0x83>;
+
+def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>;
+def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>;
+def SIN_eg : SIN_Common<0x8D>;
+def COS_eg : COS_Common<0x8E>;
+def : SIN_PAT <SIN_eg>;
+def : COS_PAT <COS_eg>;
 } // End Predicates = [isEG]
 
 
//===----------------------------------------------------------------------===//
@@ -1010,10 +1013,7 @@ let Predicates = [isEGorCayman] in {
   def CNDGE_eg : CNDGE_Common<0x1B>;
   def MUL_LIT_eg : MUL_LIT_Common<0x1F>;
   def LOG_CLAMPED_eg : LOG_CLAMPED_Common<0x82>;
-  def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>;
-  def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>;
-  def SIN_eg : SIN_Common<0x8D>;
-  def COS_eg : COS_Common<0x8E>;
+
   def DOT4_eg : DOT4_Common<0xBE>;
   def : DOT4_Pat <DOT4_eg>;
   defm CUBE_eg : CUBE_Common<0xC0>;
@@ -1021,9 +1021,6 @@ let Predicates = [isEGorCayman] in {
   def SSG_eg : SSG_Common<CNDGT_eg, CNDGE_eg>;
   def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, 
EXP_IEEE_eg>;
 
-  def : SIN_PAT <SIN_eg>;
-  def : COS_PAT <COS_eg>;
-
   def FLT_TO_INT_eg : FLT_TO_INT_Common<0x50> {
     let Pattern = [];
   }
@@ -1308,9 +1305,16 @@ def MULHI_UINT_cm : MULHI_UINT_Common<0x92>;
 def RECIPSQRT_CLAMPED_cm : RECIPSQRT_CLAMPED_Common<0x87>;
 def EXP_IEEE_cm : EXP_IEEE_Common<0x81>;
 def LOG_IEEE_ : LOG_IEEE_Common<0x83>;
+
+def RECIP_CLAMPED_cm : RECIP_CLAMPED_Common<0x84>;
+def RECIPSQRT_IEEE_cm : RECIPSQRT_IEEE_Common<0x89>;
+def SIN_cm : SIN_Common<0x8D>;
+def COS_cm : COS_Common<0x8E>;
 } // End isVector = 1
 
 defm DIV_cm : DIV_Common<RECIP_IEEE_cm>;
+def : SIN_PAT <SIN_cm>;
+def : COS_PAT <COS_cm>;
 
 // RECIP_UINT emulation for Cayman
 def : Pat <
-- 
1.7.11.7

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