On Monday, August 24, 2020, Dave Airlie <airl...@gmail.com> wrote: > > amdgpu is completely scalar,
it is?? waah! that's new information to me. does it even squash vec2/3/4, predication and swizzle? what about the upstream amdgpu LLVM-IR? that still preserves vector intrinsics, right? i'm assuming that AMDVLK preserves vector intrinsics? AMDVLK's associated LLVM port was what ended up upstream, is that right? I think you will hit problems with vectorisation, because it's always > been a problem for every effort in this area, but if the CPU design is > such that everything can be vectorised and you never hit a scalar > path, that's the plan. every single scalar POWER9 opcode with very few exceptions (branch, trap) is vectorised. and you workout how texture derivatives work early, it might be > something prototype-able. good advice to plan on texture opcodes. thank you. > thing, or bring up this architecture on an x86 chip and see it works > at all. that's the plan. phase I. run on x86, IBM POWER9, etc. first [whilst still preserving vector intrinsics until as late as possible] by the time phase I is complete we hope that Simon Moll and Robin Kruppe's LLVM-IR Vector Intrinsics will have landed, at which point we can do an experimental LLVM port which supports LibreSOC POWER9 vector augmentation, swizzle, transcendentals and texturisation opcodes etc. l. -- --- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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