On Sun, Aug 23, 2020 at 1:56 AM apinheiro <apinhe...@igalia.com> wrote:
> On 22/8/20 23:59, Luke Kenneth Casson Leighton wrote: > > constructive feedback on this approach greatly appreciated: > > https://bugs.libre-soc.org/show_bug.cgi?id=251#c36 > In any case, those steps look good enough, although I lack any context > of the final target. (if i can fill in this bit) the context is: to augment the PowerISA Instruction set to add 3D opcodes *directly* to PowerISA, with the guidance, full knowledge and under the supervision of the OpenPOWER Foundation. this will include: adding sin, cos, atan2... *to PowerISA*. adding texture interpolation instructions... *to PowerISA*. adding YUV2RGB and FP32-to-RGB8888 conversion instructions... *to PowerISA*. therefore, whilst the initial target is "general purpose scalar non-accelerated non-vectorised soft-3D", this is simply because the next step is to add 3D opcodes *directly* to the POWER9 core that we are developing. i mention this because normally, GPUs are considered completely separate entities - completely separate processors. LibreSOC will be the first ever libre-licensed *hybrid* 3D-capable CPU, i.e. where the *main processor* ISA is augmented to no longer need a completely separate GPU. i appreciate that i have said the same thing in several different ways. this is because hybrid CPU/VPU/GPUs are so unusual and so "not normal industry practice" (because they're easier to sell if they're separate) that it takes a while to sink in. i know of only one commercial company that has developed a hybrid CPU/VPU/GPU (they called it a GPGPU - general purpose GPU) - by ICubeCorp. back around 2012-2015 they received government funding sufficient to complete the IC3128 and associated VLIW compiler. an SGI Engineer who went on to work for both AMD and NVidia created the ISA and designed the architecture. l. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
