For the series:
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek
On Mon, Feb 11, 2019 at 7:15 PM Timothy Arceri <tarc...@itsqueeze.com>
wrote:
> shader-db results for VEGA64:
>
> Totals from affected shaders:
> SGPRS: 1976 -> 1976 (0.00 %)
> VGPRS: 1240 -> 1144 (-7.74 %)
> Spilled SGPRs: 145 -> 145 (0.00 %)
> Spilled VGPRs: 0 -> 0 (0.00 %)
> Private memory VGPRs: 0 -> 0 (0.00 %)
> Scratch size: 0 -> 0 (0.00 %) dwords per thread
> Code Size: 34632 -> 34604 (-0.08 %) bytes
> LDS: 0 -> 0 (0.00 %) blocks
> Max Waves: 261 -> 285 (9.20 %)
> Wait states: 0 -> 0 (0.00 %)
> ---
> src/gallium/drivers/radeonsi/si_shader_nir.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
> b/src/gallium/drivers/radeonsi/si_shader_nir.c
> index 4eec57b406d..55a950a675c 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_nir.c
> +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
> @@ -74,9 +74,18 @@ static void gather_intrinsic_load_deref_info(const
> nir_shader *nir,
> }
> break;
> }
> - default:
> + default: {
> + unsigned semantic_name, semantic_index;
> + tgsi_get_gl_varying_semantic(var->data.location, true,
> + &semantic_name,
> &semantic_index);
> +
> + if (semantic_name == TGSI_SEMANTIC_COLOR) {
> + uint8_t mask =
> nir_ssa_def_components_read(&instr->dest.ssa);
> + info->colors_read |= mask << (semantic_index * 4);
> + }
> break;
> }
> + }
> }
>
> static void scan_instruction(const struct nir_shader *nir,
> --
> 2.20.1
>
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