This is version 2.0 of the initial i965/gen6 MSAA implementation,
based on review comments and some further development. The first 5
patches in that series were preparatory refactoring, and received
positive reviews, so I've already pushed them.
Significant changes since v1 last week:
- Better organization of the functions to configure WM when doing MSAA
blits.
- intel_prepare_render is now called at the correct time.
- MSAA blits now support mirroring of X and Y coordinates.
- Number of samples is now properly quantized to the next higher
sample count supported by the hardware.
- Gen7 MSAA-related code is disabled for now.
I'm hoping to land this patch series, and send out the Gen7 code for
review, by the end of the day tomorrow.
[PATCH v2 1/5] i965: Parameterize HiZ code to prepare for adding blitting.
[PATCH v2 2/5] i965: split gen{6,7}_blorp_exec functions into manageable chunks.
[PATCH v2 3/5] i965: Expose surface setup internals for use by blits.
[PATCH v2 4/5] i965/gen6+: Add code to perform blits on the render path
("blorp").
[PATCH v2 5/5] i965/gen6: Initial implementation of MSAA.
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