We need this function to emit code that setups the control register later with
the defined execution mode for the shader.
Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
---
src/intel/compiler/brw_fs.h | 1 +
src/intel/compiler/brw_fs_visitor.cpp | 52 +++++++++++++++++++++++++++
2 files changed, 53 insertions(+)
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index f79f8554fb9..3f38faf94bb 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -187,6 +187,7 @@ public:
void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
fs_reg resolve_source_modifiers(const fs_reg &src);
void emit_discard_jump();
+ void emit_shader_float_controls_execution_mode();
bool opt_peephole_sel();
bool opt_peephole_csel();
bool opt_peephole_predicated_break();
diff --git a/src/intel/compiler/brw_fs_visitor.cpp
b/src/intel/compiler/brw_fs_visitor.cpp
index 51a0ca2374a..2da06cf78d0 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -198,6 +198,58 @@ fs_visitor::emit_interpolation_setup_gen4()
abld.emit(SHADER_OPCODE_RCP, this->pixel_w, wpos_w);
}
+static unsigned
+brw_rnd_mode_from_nir(unsigned mode, unsigned *mask)
+{
+ unsigned brw_mode = 0;
+ *mask = 0;
+
+ if (mode & SHADER_ROUNDING_MODE_RTZ) {
+ brw_mode |= BRW_RND_MODE_RTZ << BRW_CR0_RND_MODE_SHIFT;
+ *mask |= BRW_CR0_RND_MODE_MASK;
+ }
+ if (mode & SHADER_ROUNDING_MODE_RTE) {
+ brw_mode |= BRW_RND_MODE_RTNE << BRW_CR0_RND_MODE_SHIFT;
+ *mask |= BRW_CR0_RND_MODE_MASK;
+ }
+ if (mode & SHADER_DENORM_PRESERVE_FP16) {
+ brw_mode |= BRW_CR0_FP16_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP16_DENORM_PRESERVE;
+ }
+ if (mode & SHADER_DENORM_PRESERVE_FP32) {
+ brw_mode |= BRW_CR0_FP32_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP32_DENORM_PRESERVE;
+ }
+ if (mode & SHADER_DENORM_PRESERVE_FP64) {
+ brw_mode |= BRW_CR0_FP64_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP64_DENORM_PRESERVE;
+ }
+ if (mode & SHADER_DENORM_FLUSH_TO_ZERO_FP16)
+ *mask |= BRW_CR0_FP16_DENORM_PRESERVE;
+ if (mode & SHADER_DENORM_FLUSH_TO_ZERO_FP32)
+ *mask |= BRW_CR0_FP32_DENORM_PRESERVE;
+ if (mode & SHADER_DENORM_FLUSH_TO_ZERO_FP64)
+ *mask |= BRW_CR0_FP64_DENORM_PRESERVE;
+ if (mode == SHADER_DEFAULT_FLOAT_CONTROL_MODE)
+ *mask |= BRW_CR0_RND_MODE_MASK;
+
+ return brw_mode;
+}
+
+void
+fs_visitor::emit_shader_float_controls_execution_mode()
+{
+ unsigned execution_mode =
this->nir->info.shader_float_controls_execution_mode;
+ if (execution_mode == SHADER_DEFAULT_FLOAT_CONTROL_MODE)
+ return;
+
+ fs_builder abld = bld.annotate("shader floats control execution mode");
+ unsigned mask = 0;
+ unsigned mode = brw_rnd_mode_from_nir(execution_mode, &mask);
+ abld.emit(SHADER_OPCODE_FLOAT_CONTROL_MODE, bld.null_reg_ud(),
+ brw_imm_d(mode), brw_imm_d(mask));
+}
+
/** Emits the interpolation for the varying inputs. */
void
fs_visitor::emit_interpolation_setup_gen6()
--
2.19.1
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