The function goes through the compiled shader and checks how many grouped
texture fetches there are. This is a simple heuristic which gets rid of most
of the regressions when enabling SIMD32 shaders but still retains some of
the benefits.
---
src/intel/compiler/brw_fs.cpp | 26 ++++++++++++++++++++++++++
src/intel/compiler/brw_fs.h | 2 ++
2 files changed, 28 insertions(+)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 23a25fe..02e151f 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7299,6 +7299,32 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
return g.get_assembly();
}
+bool
+fs_visitor::run_heuristic(const struct brw_simd32_heuristics_control *ctrl) {
+ int grouped_sends = 0;
+ int max_grouped_sends = 0;
+ bool pass = true;
+
+ foreach_block_and_inst(block, fs_inst, inst, cfg) {
+ if (inst->opcode >= SHADER_OPCODE_TEX && inst->opcode <=
SHADER_OPCODE_SAMPLEINFO_LOGICAL) {
+ ++grouped_sends;
+ } else if (grouped_sends > 0) {
+ if (grouped_sends > max_grouped_sends) {
+ max_grouped_sends = grouped_sends;
+ }
+ grouped_sends = 0;
+ }
+ }
+
+ if (ctrl->grouped_sends_check) {
+ if (max_grouped_sends > ctrl->max_grouped_sends) {
+ pass = false;
+ }
+ }
+
+ return pass;
+}
+
fs_reg *
fs_visitor::emit_cs_work_group_id_setup()
{
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index a344d7c..d7e4abf 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -286,6 +286,8 @@ public:
void dump_instruction(backend_instruction *inst);
void dump_instruction(backend_instruction *inst, FILE *file);
+ bool run_heuristic(const struct brw_simd32_heuristics_control *ctrl);
+
const void *const key;
const struct brw_sampler_prog_key_data *key_tex;
--
2.7.4
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