The SIMD32 selection heuristics will use this information for deciding whether
SIMD32 shaders should be used.
---
src/intel/compiler/brw_fs.h | 2 ++
src/intel/compiler/brw_fs_generator.cpp | 12 ++++++++++++
2 files changed, 14 insertions(+)
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index aba19d5..a344d7c 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -397,6 +397,7 @@ public:
void enable_debug(const char *shader_name);
int generate_code(const cfg_t *cfg, int dispatch_width);
+ int get_inst_count(int dispatch_width);
const unsigned *get_assembly();
private:
@@ -489,6 +490,7 @@ private:
struct brw_stage_prog_data * const prog_data;
unsigned dispatch_width; /**< 8, 16 or 32 */
+ int inst_count[3]; /* for 8, 16 and 32 */
exec_list discard_halt_patches;
unsigned promoted_constants;
diff --git a/src/intel/compiler/brw_fs_generator.cpp
b/src/intel/compiler/brw_fs_generator.cpp
index cb402cd..797824e 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -2486,6 +2486,8 @@ fs_generator::generate_code(const cfg_t *cfg, int
dispatch_width)
fill_count, promoted_constants, before_size,
after_size);
+ inst_count[ffs(dispatch_width) - 4] = before_size / 16;
+
return start_offset;
}
@@ -2494,3 +2496,13 @@ fs_generator::get_assembly()
{
return brw_get_program(p, &prog_data->program_size);
}
+
+int
+fs_generator::get_inst_count(int dispatch_width)
+{
+ if (dispatch_width == 8 || dispatch_width == 16 || dispatch_width == 32) {
+ return inst_count[ffs(dispatch_width) - 4];
+ } else {
+ return 0;
+ }
+}
\ No newline at end of file
--
2.7.4
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