Gen >= 9 have ability to control clamping of depth values
separately at near and far plane.
z_w is clamped to the range [min(n,f), 0] if clamping
at near plane is enabled, [0, max(n,f)] if clamping at
far plane is enabled and [min(n,f) max(n,f)] if clamping
at both plane is enabled.
Signed-off-by: Sagar Ghuge <sagar.gh...@intel.com>
---
src/mesa/drivers/dri/i965/genX_state_upload.c | 21 ++++++++++++++++---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index ea5ad55be5..75d9bd2b9b 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -2341,6 +2341,12 @@ genX(upload_cc_viewport)(struct brw_context *brw)
if (ctx->Transform.DepthClamp) {
ccv.MinimumDepth = MIN2(vp->Near, vp->Far);
ccv.MaximumDepth = MAX2(vp->Near, vp->Far);
+ } else if (ctx->Transform.DepthClampNear) {
+ ccv.MinimumDepth = MIN2(vp->Near, vp->Far);
+ ccv.MaximumDepth = 0.0;
+ } else if (ctx->Transform.DepthClampFar) {
+ ccv.MinimumDepth = 0.0;
+ ccv.MaximumDepth = MAX2(vp->Near, vp->Far);
} else {
ccv.MinimumDepth = 0.0;
ccv.MaximumDepth = 1.0;
@@ -4603,15 +4609,24 @@ genX(upload_raster)(struct brw_context *brw)
/* _NEW_SCISSOR */
raster.ScissorRectangleEnable = ctx->Scissor.EnableFlags;
+#if GEN_GEN < 9
/* _NEW_TRANSFORM */
if (!ctx->Transform.DepthClamp) {
+ raster.ViewportZClipTestEnable = true;
+ }
+#endif
+
#if GEN_GEN >= 9
- raster.ViewportZFarClipTestEnable = true;
+ if (!ctx->Transform.DepthClampNear) {
raster.ViewportZNearClipTestEnable = true;
-#else
- raster.ViewportZClipTestEnable = true;
+ }
#endif
+
+#if GEN_GEN >= 9
+ if (!ctx->Transform.DepthClampFar) {
+ raster.ViewportZFarClipTestEnable = true;
}
+#endif
/* BRW_NEW_CONSERVATIVE_RASTERIZATION */
#if GEN_GEN >= 9
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 2e28445ae3..0b7ce7b368 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -300,6 +300,7 @@ intelInitExtensions(struct gl_context *ctx)
}
if (devinfo->gen >= 9) {
+ ctx->Extensions.AMD_depth_clamp_separate = true;
ctx->Extensions.ANDROID_extension_pack_es31a = true;
ctx->Extensions.ARB_shader_stencil_export = true;
ctx->Extensions.KHR_blend_equation_advanced_coherent = true;
--
2.17.1
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