Define a new STORE opcode with a role dual to the LOAD opcode, and add
flags to specify that a resource, sampler view, or shader resource
binding point is intended for writing.
---
src/gallium/auxiliary/tgsi/tgsi_build.c | 4 +++
src/gallium/auxiliary/tgsi/tgsi_dump.c | 2 ++
src/gallium/auxiliary/tgsi/tgsi_info.c | 1 +
src/gallium/auxiliary/tgsi/tgsi_text.c | 4 +++
src/gallium/auxiliary/util/u_sampler.c | 1 +
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/docs/source/tgsi.rst | 38 +++++++++++++++++++++++-----
src/gallium/include/pipe/p_defines.h | 1 +
src/gallium/include/pipe/p_shader_tokens.h | 7 +++--
src/gallium/include/pipe/p_state.h | 1 +
10 files changed, 52 insertions(+), 9 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c
b/src/gallium/auxiliary/tgsi/tgsi_build.c
index 9901479..1239ce4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_build.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_build.c
@@ -259,6 +259,7 @@ tgsi_default_declaration_resource(void)
declaration_resource.Resource = TGSI_BUFFER;
declaration_resource.Raw = 0;
+ declaration_resource.Writable = 0;
declaration_resource.ReturnTypeX = PIPE_TYPE_UNORM;
declaration_resource.ReturnTypeY = PIPE_TYPE_UNORM;
declaration_resource.ReturnTypeZ = PIPE_TYPE_UNORM;
@@ -270,6 +271,7 @@ tgsi_default_declaration_resource(void)
static struct tgsi_declaration_resource
tgsi_build_declaration_resource(unsigned texture,
unsigned raw,
+ unsigned writable,
unsigned return_type_x,
unsigned return_type_y,
unsigned return_type_z,
@@ -282,6 +284,7 @@ tgsi_build_declaration_resource(unsigned texture,
declaration_resource = tgsi_default_declaration_resource();
declaration_resource.Resource = texture;
declaration_resource.Raw = raw;
+ declaration_resource.Writable = writable;
declaration_resource.ReturnTypeX = return_type_x;
declaration_resource.ReturnTypeY = return_type_y;
declaration_resource.ReturnTypeZ = return_type_z;
@@ -418,6 +421,7 @@ tgsi_build_full_declaration(
*dr = tgsi_build_declaration_resource(full_decl->Resource.Resource,
full_decl->Resource.Raw,
+ full_decl->Resource.Writable,
full_decl->Resource.ReturnTypeX,
full_decl->Resource.ReturnTypeY,
full_decl->Resource.ReturnTypeZ,
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c
b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index 0f1a839..a8d5148 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -285,6 +285,8 @@ iter_declaration(
if (decl->Declaration.File == TGSI_FILE_RESOURCE) {
TXT(", ");
ENM(decl->Resource.Resource, tgsi_texture_names);
+ if (decl->Resource.Writable)
+ TXT(", WR");
if (decl->Resource.Raw) {
TXT(", RAW");
} else {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 81df96b..a6cd194 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -199,6 +199,7 @@ static const struct tgsi_opcode_info
opcode_info[TGSI_OPCODE_LAST] =
{ 1, 3, 0, 0, 0, 0, COMP, "UCMP", TGSI_OPCODE_UCMP },
{ 1, 1, 0, 0, 0, 0, COMP, "IABS", TGSI_OPCODE_IABS },
{ 1, 1, 0, 0, 0, 0, COMP, "ISSG", TGSI_OPCODE_ISSG },
+ { 1, 2, 0, 0, 0, 0, OTHR, "STORE", TGSI_OPCODE_STORE },
};
const struct tgsi_opcode_info *
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c
b/src/gallium/auxiliary/tgsi/tgsi_text.c
index 1ca2c5d..a0b45d4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -1078,6 +1078,10 @@ static boolean parse_declaration( struct translate_ctx
*ctx )
!is_digit_alpha_underscore(cur2)) {
decl.Resource.Raw = 1;
+ } else if (str_match_no_case(&cur2, "WR") &&
+ !is_digit_alpha_underscore(cur2)) {
+ decl.Resource.Writable = 1;
+
} else {
break;
}
diff --git a/src/gallium/auxiliary/util/u_sampler.c
b/src/gallium/auxiliary/util/u_sampler.c
index 227641b..94c6c03 100644
--- a/src/gallium/auxiliary/util/u_sampler.c
+++ b/src/gallium/auxiliary/util/u_sampler.c
@@ -46,6 +46,7 @@ default_template(struct pipe_sampler_view *view,
*/
view->format = format;
+ view->writable = 0;
view->u.tex.first_level = 0;
view->u.tex.last_level = texture->last_level;
view->u.tex.first_layer = 0;
diff --git a/src/gallium/docs/source/screen.rst
b/src/gallium/docs/source/screen.rst
index 6e1877a..622731f 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -237,6 +237,8 @@ resources might be created and handled quite differently.
process.
* ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
address space of a compute program.
+* ``PIPE_BIND_WRITABLE_VIEW``: A texture or buffer that can be written
+ from a shader stage.
.. _pipe_usage:
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index ca4559c..a87f774 100644
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -1335,8 +1335,8 @@ instructions. If in doubt double check Direct3D
documentation.
modes, in cases where that behavior is desirable
'sample' instruction should be used.
address.w provides an unsigned integer mipmap level.
- Its value is always ignored for buffers or raw
- resources, and the first mipmap level is used
+ Its value is always ignored for buffers, writable or
+ raw resources, and the first mipmap level is used
instead. If the value is out of the range then the
instruction always returns 0 in all components.
address.yz are ignored for buffers and 1d textures.
@@ -1363,13 +1363,35 @@ instructions. If in doubt double check Direct3D
documentation.
PIPE_TEXTURE_1D_ARRAY x idx mpl
PIPE_TEXTURE_2D_ARRAY x y idx mpl
- Where 'mpl' is a mipmap level (ignored for raw
- resources) and 'idx' is the array index.
-
+ Where 'mpl' is a mipmap level (ignored for raw and
+ writable resources) and 'idx' is the array index.
.. opcode:: LOAD_MS - Just like LOAD but allows fetch data from
multi-sampled surfaces.
+.. opcode:: STORE - Using the provided integer address, STORE writes
+ to the specified buffer/texture. The resource type can
+ be anything other than CUBE.
+
+ STORE resource, address, src
+ e.g.
+ STORE RES[0], TEMP[0], TEMP[1]
+
+ The 'address' is specified as unsigned integers. If the
+ 'address' is out of range [0...(# texels - 1)] the
+ result is undefined. As such the instruction doesn't
+ honor address wrap modes.
+
+ The value of address.w is ignored for writable
+ resources, only the first mipmap level is used.
+ address.yz are ignored for buffers and 1d
+ textures. address.z is ignored for 1d texture arrays
+ and 2d textures. For 1D texture arrays address.y
+ provides the array index (also as unsigned integer).
+ For 2D texture arrays address.z provides the array
+ index. For the exact semantics of the destination
+ address see the LOAD opcode.
+
.. opcode:: SAMPLE - Using provided address, sample data from the
specified texture using the filtering mode identified
by the gven sampler. The source data may come from
@@ -1703,7 +1725,7 @@ Declaration Resource
Follows Declaration token if file is TGSI_FILE_RESOURCE.
- DCL RES[#], resource [, RAW] [, type(s)]
+ DCL RES[#], resource [, WR] [, RAW] [, type(s)]
Declares a shader input resource and assigns it to a RES[#]
register.
@@ -1727,7 +1749,9 @@ Declaration Resource
instead of texel units. The result of accessing a misaligned
address is undefined.
- Usage of the SAMPLE opcodes is not allowed on raw resources.
+ Usage of the STORE opcode is only allowed if the WR (writable) flag
+ is present. Usage of the SAMPLE opcodes is not allowed on raw or
+ writable resources.
Properties
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index af36af3..ec708b7 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -306,6 +306,7 @@ enum pipe_transfer_usage {
#define PIPE_BIND_CURSOR (1 << 16) /* mouse cursor */
#define PIPE_BIND_CUSTOM (1 << 17) /* state-tracker/winsys
usages */
#define PIPE_BIND_GLOBAL (1 << 18) /* set_global_binding */
+#define PIPE_BIND_WRITABLE_VIEW (1 << 19) /* create_sampler_view */
/* The first two flags above were previously part of the amorphous
* TEXTURE_USAGE, most of which are now descriptions of the ways a
diff --git a/src/gallium/include/pipe/p_shader_tokens.h
b/src/gallium/include/pipe/p_shader_tokens.h
index bdcd164..ad91a24 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -169,11 +169,12 @@ struct tgsi_declaration_semantic
struct tgsi_declaration_resource {
unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
unsigned Raw : 1;
+ unsigned Writable : 1;
unsigned ReturnTypeX : 3; /**< one of enum pipe_type */
unsigned ReturnTypeY : 3; /**< one of enum pipe_type */
unsigned ReturnTypeZ : 3; /**< one of enum pipe_type */
unsigned ReturnTypeW : 3; /**< one of enum pipe_type */
- unsigned Padding : 11;
+ unsigned Padding : 10;
};
/*
@@ -400,7 +401,9 @@ struct tgsi_property_data {
#define TGSI_OPCODE_IABS 159
#define TGSI_OPCODE_ISSG 160
-#define TGSI_OPCODE_LAST 161
+#define TGSI_OPCODE_STORE 161
+
+#define TGSI_OPCODE_LAST 162
#define TGSI_SAT_NONE 0 /* do not saturate */
#define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
index 477ff3c..8b6dc7e 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -377,6 +377,7 @@ struct pipe_sampler_view
unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
+ unsigned writable:1; /**< are writes to this resource allowed? */
};
--
1.7.9.2
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
