On 19/03/18 23:34, Kenneth Graunke wrote:
On Wednesday, March 14, 2018 10:19:07 AM PDT Lionel Landwerlin wrote:
This will be reused to store values reported by the kernel. The main
use case will be for use as the input values of the metric sets
equations for the INTEL_performance_queries extension. By storing this
information in the gen_device_info we make this non GL specific so
this can be reused by Vulkan if we ever have an equivalent extension.
Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
---
src/intel/dev/gen_device_info.c | 35 +++++++++++++++++++++++++++++++++--
src/intel/dev/gen_device_info.h | 5 +++++
2 files changed, 38 insertions(+), 2 deletions(-)
Nice job tracking these all down, even in the Gen4-5 PRMs, and all the
crazy fusing stuff.
@@ -260,6 +267,7 @@ static const struct gen_device_info gen_device_info_byt = {
GEN7_FEATURES, .is_baytrail = true, .gt = 1,
.num_slices = 1,
.num_subslices = { 1, },
+ .num_eu_per_subslice = 4,
.num_thread_per_eu = 8,
.l3_banks = 1,
.has_llc = false,
I guess there aren't really notions of subslices prior to Haswell, but
we're pretending to have 1 subslice, so num_eu_per_subslice is just the
total number of EUs. Seems fine...
@@ -468,6 +482,7 @@ static const struct gen_device_info gen_device_info_chv = {
.has_integer_dword_mul = false,
.num_slices = 1,
.num_subslices = { 2, },
+ .num_eu_per_subslice = 8,
You're probably going to have to update this to 6 based on the
Cherryview fusing information. Look for sseu in i965. :(
Yeah, so I've put the max number here.
Once queried by the kernel we update this number.
So far, we've been putting the larger number (for the 2x8 model) in
gen_device_info and correcting it down for the 2x6 model.
We'll need to sort that out. In the meantime, this looks good.
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
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