On Wed, Mar 7, 2018 at 3:34 PM, Marek Olšák <mar...@gmail.com> wrote:
> From: Marek Olšák <marek.ol...@amd.com>
>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> src/amd/common/ac_gpu_info.c | 11 +++++++++++
> src/amd/common/ac_gpu_info.h | 2 ++
> 2 files changed, 13 insertions(+)
>
> diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
> index 7c13e5f..29e2aa8 100644
> --- a/src/amd/common/ac_gpu_info.c
> +++ b/src/amd/common/ac_gpu_info.c
> @@ -94,20 +94,21 @@ static bool has_syncobj(int fd)
>
> bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
> struct radeon_info *info,
> struct amdgpu_gpu_info *amdinfo)
> {
> struct amdgpu_buffer_size_alignments alignment_info = {};
> struct amdgpu_heap_info vram, vram_vis, gtt;
> struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {};
> struct drm_amdgpu_info_hw_ip uvd_enc = {}, vce = {}, vcn_dec = {};
> struct drm_amdgpu_info_hw_ip vcn_enc = {}, gfx = {};
> + struct amdgpu_gds_resource_info gds = {};
> uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0,
> uvd_feature = 0;
> int r, i, j;
> drmDevicePtr devinfo;
>
> /* Get PCI info. */
> r = drmGetDevice2(fd, 0, &devinfo);
> if (r) {
> fprintf(stderr, "amdgpu: drmGetDevice2 failed.\n");
> return false;
> }
> @@ -241,20 +242,26 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
> fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(vce)
> failed.\n");
> return false;
> }
>
> r = amdgpu_query_sw_info(dev, amdgpu_sw_info_address32_hi,
> &info->address32_hi);
> if (r) {
> fprintf(stderr, "amdgpu: amdgpu_query_sw_info(address32_hi)
> failed.\n");
> return false;
> }
>
> + r = amdgpu_query_gds_info(dev, &gds);
> + if (r) {
> + fprintf(stderr, "amdgpu: amdgpu_query_gds_info failed.\n");
> + return false;
> + }
> +
> /* Set chip identification. */
> info->pci_id = amdinfo->asic_id; /* TODO: is this correct? */
> info->vce_harvest_config = amdinfo->vce_harvest_config;
>
> switch (info->pci_id) {
> #define CHIPSET(pci_id, cfamily) case pci_id: info->family = CHIP_##cfamily;
> break;
> #include "pci_ids/radeonsi_pci_ids.h"
> #undef CHIPSET
>
> default:
> @@ -276,20 +283,22 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
> }
>
> /* Set which chips have dedicated VRAM. */
> info->has_dedicated_vram =
> !(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
>
> /* Set hardware information. */
> info->gart_size = gtt.heap_size;
> info->vram_size = vram.heap_size;
> info->vram_vis_size = vram_vis.heap_size;
> + info->gds_size = gds.gds_total_size;
> + info->gds_gfx_partition_size = gds.gds_gfx_partition_size;
> /* The kernel can split large buffers in VRAM but not in GTT, so large
> * allocations can fail or cause buffer movement failures in the
> kernel.
> */
> info->max_alloc_size = MIN2(info->vram_size * 0.9, info->gart_size *
> 0.7);
> /* convert the shader clock from KHz to MHz */
> info->max_shader_clock = amdinfo->max_engine_clk / 1000;
> info->max_se = amdinfo->num_shader_engines;
> info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
> info->has_hw_decode =
> (uvd.available_rings != 0) || (vcn_dec.available_rings != 0);
> @@ -396,20 +405,22 @@ void ac_print_gpu_info(struct radeon_info *info)
> info->pci_domain, info->pci_bus,
> info->pci_dev, info->pci_func);
> printf("pci_id = 0x%x\n", info->pci_id);
> printf("family = %i\n", info->family);
> printf("chip_class = %i\n", info->chip_class);
> printf("pte_fragment_size = %u\n", info->pte_fragment_size);
> printf("gart_page_size = %u\n", info->gart_page_size);
> printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size,
> 1024*1024));
> printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size,
> 1024*1024));
> printf("vram_vis_size = %i MB\n",
> (int)DIV_ROUND_UP(info->vram_vis_size, 1024*1024));
> + printf("gds_size = %u kB\n", info->gds_size / 1024);
> + printf("gds_gfx_partition_size = %u kB\n",
> info->gds_gfx_partition_size / 1024);
> printf("max_alloc_size = %i MB\n",
> (int)DIV_ROUND_UP(info->max_alloc_size, 1024*1024));
> printf("min_alloc_size = %u\n", info->min_alloc_size);
> printf("address32_hi = %u\n", info->address32_hi);
> printf("has_dedicated_vram = %u\n", info->has_dedicated_vram);
> printf("has_virtual_memory = %i\n", info->has_virtual_memory);
> printf("gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);
> printf("has_hw_decode = %u\n", info->has_hw_decode);
> printf("num_sdma_rings = %i\n", info->num_sdma_rings);
> printf("num_compute_rings = %u\n", info->num_compute_rings);
> diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
> index 0beba96..34d91be 100644
> --- a/src/amd/common/ac_gpu_info.h
> +++ b/src/amd/common/ac_gpu_info.h
> @@ -48,20 +48,22 @@ struct radeon_info {
>
> /* Device info. */
> uint32_t pci_id;
> enum radeon_family family;
> enum chip_class chip_class;
> uint32_t pte_fragment_size;
> uint32_t gart_page_size;
> uint64_t gart_size;
> uint64_t vram_size;
> uint64_t vram_vis_size;
> + unsigned gds_size;
> + unsigned gds_gfx_partition_size;
> uint64_t max_alloc_size;
> uint32_t min_alloc_size;
> uint32_t address32_hi;
> bool has_dedicated_vram;
> bool has_virtual_memory;
> bool gfx_ib_pad_with_type2;
> bool has_hw_decode;
> unsigned ib_start_alignment;
> uint32_t num_sdma_rings;
> uint32_t num_compute_rings;
> --
> 2.7.4
>
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> mesa-dev@lists.freedesktop.org
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