On Tue, Mar 06, 2018 at 12:20:58AM -0800, Kenneth Graunke wrote: > On Monday, March 5, 2018 2:07:54 PM PST Nanley Chery wrote: > > Cc: Rafael Antognolli <rafael.antogno...@intel.com> > > --- > > src/mesa/drivers/dri/i965/intel_extensions.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c > > b/src/mesa/drivers/dri/i965/intel_extensions.c > > index 73a6c73f537..c451f6cf749 100644 > > --- a/src/mesa/drivers/dri/i965/intel_extensions.c > > +++ b/src/mesa/drivers/dri/i965/intel_extensions.c > > @@ -297,7 +297,7 @@ intelInitExtensions(struct gl_context *ctx) > > ctx->Extensions.ARB_post_depth_coverage = true; > > } > > > > - if (gen_device_info_is_9lp(devinfo)) > > + if (devinfo->gen == 10 || gen_device_info_is_9lp(devinfo)) > > ctx->Extensions.KHR_texture_compression_astc_hdr = true; > > > > if (devinfo->gen >= 6) > > > > What about Icelake? Shouldn't this be gen >= 10 || gen9lp?
There's a lot of churn with this feature unfortunately. As far as I can tell, this isn't available on IceLake. If you follow the link trail (below) in the BSpec, you'll come a cross a note and some links explaining the situation. Memory Data Formats » Common Surface Formats » Compressed Surface Formats » Adaptive Scalable Texture Compression (ASTC) [CHV, SKL+] » ASTC Fundamentals CHV, SKL+ » Background [CHV, SKL+] -Nanley > > --Ken _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
