On Tue, Mar 06, 2018 at 12:19:39AM -0800, Kenneth Graunke wrote:
> On Monday, March 5, 2018 2:07:53 PM PST Nanley Chery wrote:
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > index c6213b21629..8586968fd6f 100644
> > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > @@ -205,11 +205,11 @@ intel_miptree_supports_ccs(struct brw_context *brw,
> > if (devinfo->gen < 8 && (mip_mapped || arrayed))
> > return false;
> >
> > - /* There's no point in using an MCS buffer if the surface isn't in a
> > - * renderable format.
> > - */
> > - if (!brw->mesa_format_supports_render[mt->format])
> > + /* There's no need for an MCS buffer if the surface isn't renderable. */
> > + if (!brw->mesa_format_supports_render[mt->format] ||
> > + (mt->etc_format != MESA_FORMAT_NONE)) {
> > return false;
> > + }
> >
> > return true;
> > }
> >
>
> I'm confused...we only emulate ETC on Gen < 8. CCS_E only exists on
> Gen >= 9. CCS_D does exsit on Gen7-7.5...but I thought we deferred
> CCS_D allocations until the first fast clear...and I don't think it's
> possible to bind an ETC texture as a render target for clearing anyway.
> Maybe ClearTexture but I have my doubts there, too...
Oh, you're right. It's never allocated. I saw that were were setting the
aux_usage to CCS_D and assumed the allocation. I'll send a v2.
-Nanley
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