v2: support more sys values
fixed a bug where for multi component reads all values ended up in x
v3: add load_patch_vertices_in
Signed-off-by: Karol Herbst <kher...@redhat.com>
---
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 87 ++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index fe4a561975..21554bb50e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -80,6 +80,7 @@ public:
LValues& convert(nir_alu_dest *);
BasicBlock* convert(nir_block *);
LValues& convert(nir_dest *);
+ SVSemantic convert(nir_intrinsic_op);
LValues& convert(nir_register *);
LValues& convert(nir_ssa_def *);
@@ -1324,6 +1325,57 @@ Converter::visit(nir_jump_instr *insn)
return true;
}
+SVSemantic
+Converter::convert(nir_intrinsic_op intr)
+{
+ switch (intr) {
+ case nir_intrinsic_load_base_vertex:
+ return SV_BASEVERTEX;
+ case nir_intrinsic_load_base_instance:
+ return SV_BASEINSTANCE;
+ case nir_intrinsic_load_draw_id:
+ return SV_DRAWID;
+ case nir_intrinsic_load_front_face:
+ return SV_FACE;
+ case nir_intrinsic_load_instance_id:
+ return SV_INSTANCE_ID;
+ case nir_intrinsic_load_invocation_id:
+ return SV_INVOCATION_ID;
+ case nir_intrinsic_load_local_group_size:
+ return SV_NTID;
+ case nir_intrinsic_load_local_invocation_id:
+ return SV_TID;
+ case nir_intrinsic_load_num_work_groups:
+ return SV_NCTAID;
+ case nir_intrinsic_load_patch_vertices_in:
+ return SV_VERTEX_COUNT;
+ case nir_intrinsic_load_primitive_id:
+ return SV_PRIMITIVE_ID;
+ case nir_intrinsic_load_sample_id:
+ return SV_SAMPLE_INDEX;
+ case nir_intrinsic_load_sample_mask_in:
+ return SV_SAMPLE_MASK;
+ case nir_intrinsic_load_sample_pos:
+ return SV_SAMPLE_POS;
+ case nir_intrinsic_load_subgroup_invocation:
+ return SV_LANEID;
+ case nir_intrinsic_load_tess_coord:
+ return SV_TESS_COORD;
+ case nir_intrinsic_load_tess_level_inner:
+ return SV_TESS_INNER;
+ case nir_intrinsic_load_tess_level_outer:
+ return SV_TESS_OUTER;
+ case nir_intrinsic_load_vertex_id:
+ return SV_VERTEX_ID;
+ case nir_intrinsic_load_work_group_id:
+ return SV_CTAID;
+ default:
+ ERROR("unknown SVSemantic for nir_intrinsic_op %s\n",
nir_intrinsic_infos[intr].name);
+ assert(false);
+ return SV_LAST;
+ }
+}
+
bool
Converter::visit(nir_intrinsic_instr *insn)
{
@@ -1440,6 +1492,41 @@ Converter::visit(nir_intrinsic_instr *insn)
mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, pred);
break;
}
+ case nir_intrinsic_load_base_vertex:
+ case nir_intrinsic_load_base_instance:
+ case nir_intrinsic_load_draw_id:
+ case nir_intrinsic_load_front_face:
+ case nir_intrinsic_load_instance_id:
+ case nir_intrinsic_load_invocation_id:
+ case nir_intrinsic_load_local_group_size:
+ case nir_intrinsic_load_local_invocation_id:
+ case nir_intrinsic_load_num_work_groups:
+ case nir_intrinsic_load_patch_vertices_in:
+ case nir_intrinsic_load_primitive_id:
+ case nir_intrinsic_load_sample_id:
+ case nir_intrinsic_load_sample_mask_in:
+ case nir_intrinsic_load_sample_pos:
+ case nir_intrinsic_load_subgroup_invocation:
+ case nir_intrinsic_load_tess_coord:
+ case nir_intrinsic_load_tess_level_inner:
+ case nir_intrinsic_load_tess_level_outer:
+ case nir_intrinsic_load_vertex_id:
+ case nir_intrinsic_load_work_group_id: {
+ SVSemantic sv = convert(op);
+ LValues &newDefs = convert(&insn->dest);
+
+ for (auto i = 0u; i < insn->num_components; ++i) {
+ if (sv == SV_TID && info->prop.cp.numThreads[i] == 1) {
+ loadImm(newDefs[i], 0u);
+ continue;
+ }
+ Symbol *sym = mkSysVal(sv, i);
+ Instruction *rdsv = mkOp1(OP_RDSV, TYPE_U32, newDefs[i], sym);
+ if (sv == SV_TESS_OUTER || sv == SV_TESS_INNER)
+ rdsv->perPatch = 1;
+ }
+ break;
+ }
default:
ERROR("unknown nir_intrinsic_op %s\n", nir_intrinsic_infos[op].name);
return false;
--
2.14.3
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