v2: allow for non debug builds as well
v3: move reading out env var more global
disable tg4 with multiple offsets with nir
disable caps for 64 bit types
Signed-off-by: Karol Herbst <kher...@redhat.com>
---
src/gallium/drivers/nouveau/nouveau_screen.c | 4 ++++
src/gallium/drivers/nouveau/nouveau_screen.h | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 16 ++++++++++------
3 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c
b/src/gallium/drivers/nouveau/nouveau_screen.c
index c144b39b2d..6c52f9e40c 100644
--- a/src/gallium/drivers/nouveau/nouveau_screen.c
+++ b/src/gallium/drivers/nouveau/nouveau_screen.c
@@ -175,6 +175,7 @@ nouveau_screen_init(struct nouveau_screen *screen, struct
nouveau_device *dev)
void *data;
union nouveau_bo_config mm_config;
+ char *use_nir = getenv("NV50_PROG_USE_NIR");
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
@@ -261,6 +262,9 @@ nouveau_screen_init(struct nouveau_screen *screen, struct
nouveau_device *dev)
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
+
+ screen->prefer_nir = use_nir && strtol(use_nir, NULL, 0) == 1;
+
return 0;
}
diff --git a/src/gallium/drivers/nouveau/nouveau_screen.h
b/src/gallium/drivers/nouveau/nouveau_screen.h
index e4fbae99ca..1229b66b26 100644
--- a/src/gallium/drivers/nouveau/nouveau_screen.h
+++ b/src/gallium/drivers/nouveau/nouveau_screen.h
@@ -62,6 +62,8 @@ struct nouveau_screen {
struct disk_cache *disk_shader_cache;
+ bool prefer_nir;
+
#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
union {
uint64_t v[29];
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index e88171bd61..22d40c7a02 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -112,7 +112,8 @@ static int
nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
- struct nouveau_device *dev = nouveau_screen(pscreen)->device;
+ const struct nouveau_screen *screen = nouveau_screen(pscreen);
+ struct nouveau_device *dev = screen->device;
switch (param) {
/* non-boolean caps */
@@ -219,7 +220,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_USER_VERTEX_BUFFERS:
case PIPE_CAP_TEXTURE_QUERY_LOD:
case PIPE_CAP_SAMPLE_SHADING:
- case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
@@ -251,14 +251,17 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
- case PIPE_CAP_DOUBLES:
- case PIPE_CAP_INT64:
case PIPE_CAP_TGSI_TEX_TXF_LZ:
case PIPE_CAP_TGSI_CLOCK:
case PIPE_CAP_COMPUTE:
case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
return 1;
+ case PIPE_CAP_DOUBLES:
+ case PIPE_CAP_INT64:
+ case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
+ /* TODO: nir doesn't support tg4 with multiple offsets */
+ return screen->prefer_nir ? 0 : 1;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
@@ -340,7 +343,8 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
- const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
+ const struct nouveau_screen *screen = nouveau_screen(pscreen);
+ const uint16_t class_3d = screen->class_3d;
switch (shader) {
case PIPE_SHADER_VERTEX:
@@ -356,7 +360,7 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
switch (param) {
case PIPE_SHADER_CAP_PREFERRED_IR:
- return PIPE_SHADER_IR_TGSI;
+ return screen->prefer_nir ? PIPE_SHADER_IR_NIR : PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 1 << PIPE_SHADER_IR_TGSI |
1 << PIPE_SHADER_IR_NIR;
--
2.14.3
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