Thanks
On October 28, 2017 15:15:48 Jordan Justen <jordan.l.jus...@intel.com> wrote:
In case you push this before the shader cache, in my current
i965-shader-cache branch, 1 & 2 have an r-b from you, and patch 1 has
an comments requested by Ken.
-Jordan
On 2017-10-28 11:36:09, Jason Ekstrand wrote:
From: Jordan Justen <jordan.l.jus...@intel.com>
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
---
src/intel/compiler/brw_compiler.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/src/intel/compiler/brw_compiler.h
b/src/intel/compiler/brw_compiler.h
index 014202d..3e0756a 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -403,6 +403,15 @@ struct brw_cs_prog_key {
struct brw_sampler_prog_key_data tex;
};
+union brw_any_prog_key {
+ struct brw_vs_prog_key vs;
+ struct brw_tcs_prog_key tcs;
+ struct brw_tes_prog_key tes;
+ struct brw_gs_prog_key gs;
+ struct brw_wm_prog_key wm;
+ struct brw_cs_prog_key cs;
+};
+
/*
* Image metadata structure as laid out in the shader parameter
* buffer. Entries have to be 16B-aligned for the vec4 back-end to be
@@ -1064,6 +1073,17 @@ struct brw_clip_prog_data {
uint32_t total_grf;
};
+union brw_any_prog_data {
+ struct brw_stage_prog_data base;
+ struct brw_vue_prog_data vue;
+ struct brw_vs_prog_data vs;
+ struct brw_tcs_prog_data tcs;
+ struct brw_tes_prog_data tes;
+ struct brw_gs_prog_data gs;
+ struct brw_wm_prog_data wm;
+ struct brw_cs_prog_data cs;
+};
+
#define DEFINE_PROG_DATA_DOWNCAST(stage) \
static inline struct brw_##stage##_prog_data * \
brw_##stage##_prog_data(struct brw_stage_prog_data *prog_data) \
--
2.5.0.400.gff86faf
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