Over-all, I'm very happy with the way this turned out. Good work to all involved! I made a few comments here and there and a pile on patch 18. That said, I think they should all be fairly easy to resolve and, should Emil be willing to hold off on branching for a couple of days, think this should be good to land. With all of the refactors and changes that have happened (particularly about params arrays and NIR serialization), I have a high level of confidence that we're probably getting it right. Obviously, user testing will be needed, but I think it's all solid in concept. Let's do this!
--Jason On Wed, Oct 18, 2017 at 10:31 PM, Jordan Justen <jordan.l.jus...@intel.com> wrote: > git://people.freedesktop.org/~jljusten/mesa i965-shader-cache-v2 > > The series adds support for a disk shader cache for i965, but it does > not enable it by default. To enable the i965 shader cache you need to > set the environment variable MESA_GLSL_CACHE_DISABLE=0. > > v2: > > * Fallback now uses Connor & Jason's nir serialization patch. This > simplified the fallback code considerably. > > * Reworked uniform handling based on Jason's new uniform handling. We > no longer have to use pointer magic, which simplified the push/pull > constant save/restore. > > * Patches 1 - 12 are for nir serialization > > Carl Worth (1): > intel/compiler: add new field for storing program size > > Connor Abbott (2): > glsl: move shader_cache type handling to glsl_types > nir: add serialization and deserialization > > Jason Ekstrand (4): > nir: Get rid of nir_shader::stage > nir/intrinsics: Set the correct num_indices for load_output > compiler/types: Support [de]serializing void types > nir: Add hooks for testing serialization > > Jordan Justen (19): > glsl: Zero per_vertex_accumulator::fields for valgrind & nir_serialize > nir: Zero local_size const struct for valgrind & nir_serialize > intel/nir: Zero local index const struct for valgrind & nir_serialize > nir: Zero nir_load_const_instr::value for valgrind & nir_serialize > glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize > glsl_to_nir: Zero nir_constant in constant_copy for valgrind & > nir_serialize > main: Add nir serialization fields to gl_program > glsl/shader_cache: Save and restore serialized nir in gl_program > i965/link: Serialize program to nir after linking for shader cache > i965: Don't rely on nir for uses_texture_gather > i965: Add shader cache support for compute > i965: add cache fallback support using serialized nir > i965: Don't link when the program was found in the disk cache > i965: Initialize sha1 hash of dri config options > glsl/shader_cache: Save fs (BlendSupport) metadata > disk_cache: Fix issue reading GLSL metadata > dri drivers: Always add the sha1 build-id > i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false > disk_cache: Add support for MESA_GLSL_CACHE_TIMESTAMP in debug builds > > Timothy Arceri (6): > i965: add initial implementation of on disk shader cache > i965: Add shader cache support for vertex and fragment stages > i965: add shader cache support for geometry shaders > i965: add shader cache support for tess stages > mesa/glsl: add api_enabled flag to gl_transform_feedback_info > i965: add support for cached shaders with xfb qualifiers > > src/amd/common/ac_nir_to_llvm.c | 30 +- > src/amd/common/ac_shader_info.c | 2 +- > src/amd/vulkan/radv_shader.c | 4 +- > src/compiler/Makefile.sources | 2 + > src/compiler/glsl/builtin_variables.cpp | 1 + > src/compiler/glsl/glsl_to_nir.cpp | 14 +- > src/compiler/glsl/link_varyings.cpp | 5 +- > src/compiler/glsl/shader_cache.cpp | 193 +--- > src/compiler/glsl_types.cpp | 174 +++ > src/compiler/glsl_types.h | 7 + > src/compiler/nir/meson.build | 2 + > src/compiler/nir/nir.c | 17 +- > src/compiler/nir/nir.h | 20 +- > src/compiler/nir/nir_clone.c | 2 +- > src/compiler/nir/nir_gather_info.c | 14 +- > src/compiler/nir/nir_intrinsics.h | 2 +- > src/compiler/nir/nir_linking_helpers.c | 14 +- > src/compiler/nir/nir_lower_alpha_test.c | 2 +- > src/compiler/nir/nir_lower_atomics.c | 2 +- > src/compiler/nir/nir_lower_bitmap.c | 2 +- > src/compiler/nir/nir_lower_clamp_color_outputs.c | 2 +- > .../nir/nir_lower_clip_cull_distance_arrays.c | 8 +- > src/compiler/nir/nir_lower_drawpixels.c | 2 +- > src/compiler/nir/nir_lower_io.c | 4 +- > src/compiler/nir/nir_lower_io_to_temporaries.c | 4 +- > src/compiler/nir/nir_lower_io_types.c | 2 +- > src/compiler/nir/nir_lower_samplers.c | 3 +- > src/compiler/nir/nir_lower_samplers_as_deref.c | 2 +- > src/compiler/nir/nir_lower_system_values.c | 1 + > src/compiler/nir/nir_lower_two_sided_color.c | 2 +- > src/compiler/nir/nir_lower_wpos_center.c | 2 +- > src/compiler/nir/nir_lower_wpos_ytransform.c | 2 +- > src/compiler/nir/nir_print.c | 6 +- > src/compiler/nir/nir_serialize.c | 1220 > ++++++++++++++++++++ > src/compiler/nir/nir_serialize.h | 43 + > src/compiler/nir/nir_validate.c | 2 +- > src/compiler/spirv/spirv_to_nir.c | 52 +- > src/compiler/spirv/vtn_variables.c | 16 +- > src/gallium/auxiliary/nir/tgsi_to_nir.c | 2 +- > src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 4 +- > src/gallium/drivers/freedreno/ir3/ir3_nir.c | 4 +- > src/gallium/drivers/radeonsi/si_shader_nir.c | 22 +- > src/gallium/drivers/vc4/vc4_program.c | 2 +- > src/intel/blorp/blorp_priv.h | 2 +- > src/intel/compiler/brw_compiler.h | 2 + > src/intel/compiler/brw_fs.cpp | 8 +- > src/intel/compiler/brw_nir.c | 24 +- > src/intel/compiler/brw_nir_analyze_ubo_ranges.c | 2 +- > src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 3 +- > src/intel/compiler/brw_nir_tcs_workarounds.c | 2 +- > src/intel/compiler/brw_shader.cpp | 14 +- > src/intel/compiler/brw_vec4.cpp | 1 + > src/intel/compiler/brw_vec4_generator.cpp | 10 +- > src/intel/compiler/brw_vec4_gs_visitor.cpp | 14 +- > src/intel/compiler/brw_vec4_tcs.cpp | 12 +- > src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 13 +- > src/intel/vulkan/anv_nir_lower_input_attachments.c | 2 +- > src/intel/vulkan/anv_nir_lower_multiview.c | 14 +- > src/intel/vulkan/anv_pipeline.c | 2 +- > src/mesa/drivers/dri/Makefile.am | 1 + > src/mesa/drivers/dri/i965/Makefile.sources | 1 + > src/mesa/drivers/dri/i965/brw_context.c | 6 + > src/mesa/drivers/dri/i965/brw_context.h | 1 + > src/mesa/drivers/dri/i965/brw_cs.c | 24 +- > src/mesa/drivers/dri/i965/brw_cs.h | 3 + > src/mesa/drivers/dri/i965/brw_disk_cache.c | 537 +++++++++ > src/mesa/drivers/dri/i965/brw_gs.c | 22 +- > src/mesa/drivers/dri/i965/brw_link.cpp | 19 +- > src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 4 +- > src/mesa/drivers/dri/i965/brw_state.h | 7 + > src/mesa/drivers/dri/i965/brw_state_upload.c | 3 + > src/mesa/drivers/dri/i965/brw_tcs.c | 23 +- > src/mesa/drivers/dri/i965/brw_tes.c | 22 +- > src/mesa/drivers/dri/i965/brw_vs.c | 20 +- > src/mesa/drivers/dri/i965/brw_wm.c | 28 +- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 +- > src/mesa/drivers/dri/i965/meson.build | 1 + > src/mesa/drivers/dri/meson.build | 2 +- > src/mesa/main/mtypes.h | 5 + > src/mesa/state_tracker/st_glsl_to_nir.cpp | 10 +- > src/util/disk_cache.c | 14 +- > 81 files changed, 2391 insertions(+), 415 deletions(-) > create mode 100644 src/compiler/nir/nir_serialize.c > create mode 100644 src/compiler/nir/nir_serialize.h > create mode 100644 src/mesa/drivers/dri/i965/brw_disk_cache.c > > -- > 2.15.0.rc0 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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