Allows to prevent exposing RGB10 configs and visuals to
clients.
Signed-off-by: Mario Kleiner <mario.kleiner...@gmail.com>
---
src/mesa/drivers/dri/i965/intel_screen.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index c0fdde3..5754ea7 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1904,11 +1904,20 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
uint8_t depth_bits[4], stencil_bits[4];
__DRIconfig **configs = NULL;
+ /* Shall we expose 10 bpc formats? */
+ bool expose_rgb10_configs = driQueryOptionb(&dri_screen->optionCache,
+ "expose_rgb10_configs");
+
/* Generate singlesample configs without accumulation buffer. */
for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs;
int num_depth_stencil_bits = 2;
+ if (!expose_rgb10_configs &&
+ (formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
+ formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
+ continue;
+
/* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
* buffer that has a different number of bits per pixel than the color
* buffer, gen >= 6 supports this.
@@ -1945,6 +1954,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs;
+ if (!expose_rgb10_configs &&
+ (formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
+ formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
+ continue;
+
if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
depth_bits[0] = 16;
stencil_bits[0] = 0;
@@ -1978,6 +1992,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
if (devinfo->gen < 6)
break;
+ if (!expose_rgb10_configs &&
+ (formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
+ formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
+ continue;
+
__DRIconfig **new_configs;
const int num_depth_stencil_bits = 2;
int num_msaa_modes = 0;
--
2.7.4
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