From: Nicolai Hähnle <nicolai.haeh...@amd.com>
v2: update for LLVMValueRefs in ac_shader_abi
---
src/amd/common/ac_nir_to_llvm.c | 5 ++---
src/amd/common/ac_shader_abi.h | 1 +
src/gallium/drivers/radeonsi/si_shader.c | 16 ++++++++++++----
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 8953a3d..bc3cb2d 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -121,21 +121,20 @@ struct nir_to_llvm_context {
LLVMValueRef esgs_ring;
LLVMValueRef gsvs_ring;
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
LLVMValueRef prim_mask;
LLVMValueRef sample_pos_offset;
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
- LLVMValueRef front_face;
LLVMValueRef ancillary;
LLVMValueRef sample_coverage;
LLVMValueRef frag_pos[4];
LLVMTypeRef i1;
LLVMTypeRef i8;
LLVMTypeRef i16;
LLVMTypeRef i32;
LLVMTypeRef i64;
LLVMTypeRef v2i32;
@@ -823,21 +822,21 @@ static void create_function(struct nir_to_llvm_context
*ctx)
add_vgpr_argument(&args, ctx->v2i32, &ctx->persp_centroid); /*
persp centroid */
add_vgpr_argument(&args, ctx->v3i32, NULL); /* persp pull model
*/
add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_sample); /*
linear sample */
add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_center); /*
linear center */
add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_centroid); /*
linear centroid */
add_vgpr_argument(&args, ctx->f32, NULL); /* line stipple tex
*/
add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[0]); /* pos
x float */
add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[1]); /* pos
y float */
add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[2]); /* pos
z float */
add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[3]); /* pos
w float */
- add_vgpr_argument(&args, ctx->i32, &ctx->front_face); /* front
face */
+ add_vgpr_argument(&args, ctx->i32, &ctx->abi.front_face); /*
front face */
add_vgpr_argument(&args, ctx->i32, &ctx->ancillary); /*
ancillary */
add_vgpr_argument(&args, ctx->i32, &ctx->sample_coverage); /*
sample coverage */
add_vgpr_argument(&args, ctx->i32, NULL); /* fixed pt */
break;
default:
unreachable("Shader stage not implemented");
}
ctx->main_function = create_llvm_function(
ctx->context, ctx->module, ctx->builder, NULL, 0, &args,
@@ -3990,21 +3989,21 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
result = unpack_param(ctx->nctx, ctx->nctx->ancillary, 8, 4);
break;
case nir_intrinsic_load_sample_pos:
ctx->nctx->shader_info->fs.force_persample = true;
result = load_sample_pos(ctx->nctx);
break;
case nir_intrinsic_load_sample_mask_in:
result = ctx->nctx->sample_coverage;
break;
case nir_intrinsic_load_front_face:
- result = ctx->nctx->front_face;
+ result = ctx->abi->front_face;
break;
case nir_intrinsic_load_instance_id:
result = ctx->abi->instance_id;
break;
case nir_intrinsic_load_num_work_groups:
result = ctx->nctx->num_work_groups;
break;
case nir_intrinsic_load_local_invocation_index:
result = visit_load_local_invocation_index(ctx->nctx);
break;
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index efbd7de..1c8d0e8 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -37,20 +37,21 @@ enum ac_descriptor_type {
* radv to share a compiler backend.
*/
struct ac_shader_abi {
enum chip_class chip_class;
LLVMValueRef base_vertex;
LLVMValueRef start_instance;
LLVMValueRef draw_id;
LLVMValueRef vertex_id;
LLVMValueRef instance_id;
+ LLVMValueRef front_face;
/* For VS and PS: pre-loaded shader inputs.
*
* Currently only used for NIR shaders; indexed by variables'
* driver_location.
*/
LLVMValueRef *inputs;
void (*emit_outputs)(struct ac_shader_abi *abi,
unsigned max_outputs,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index eb3c415..96fce0e 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -143,26 +143,33 @@ static unsigned add_arg_assign(struct si_function_info
*fninfo,
fninfo->assign[idx] = assign;
return idx;
}
static unsigned add_arg(struct si_function_info *fninfo,
enum si_arg_regfile regfile, LLVMTypeRef type)
{
return add_arg_assign(fninfo, regfile, type, NULL);
}
+static void add_arg_assign_checked(struct si_function_info *fninfo,
+ enum si_arg_regfile regfile, LLVMTypeRef
type,
+ LLVMValueRef *assign, unsigned idx)
+{
+ MAYBE_UNUSED unsigned actual = add_arg_assign(fninfo, regfile, type,
assign);
+ assert(actual == idx);
+}
+
static void add_arg_checked(struct si_function_info *fninfo,
enum si_arg_regfile regfile, LLVMTypeRef type,
unsigned idx)
{
- MAYBE_UNUSED unsigned actual = add_arg(fninfo, regfile, type);
- assert(actual == idx);
+ add_arg_assign_checked(fninfo, regfile, type, NULL, idx);
}
/**
* Returns a unique index for a per-patch semantic name and index. The index
* must be less than 32, so that a 32-bit bitmask of used inputs or outputs
* can be calculated.
*/
unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned
index)
{
switch (semantic_name) {
@@ -1554,21 +1561,21 @@ static void declare_system_value(struct
si_shader_context *ctx,
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT),
lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_RCP,
LLVMGetParam(ctx->main_fn,
SI_PARAM_POS_W_FLOAT)),
};
value = lp_build_gather_values(gallivm, pos, 4);
break;
}
case TGSI_SEMANTIC_FACE:
- value = LLVMGetParam(ctx->main_fn, SI_PARAM_FRONT_FACE);
+ value = ctx->abi.front_face;
break;
case TGSI_SEMANTIC_SAMPLEID:
value = get_sample_id(ctx);
break;
case TGSI_SEMANTIC_SAMPLEPOS: {
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
@@ -4502,21 +4509,22 @@ static void create_function(struct si_shader_context
*ctx)
add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32,
SI_PARAM_PERSP_CENTROID);
add_arg_checked(&fninfo, ARG_VGPR, v3i32,
SI_PARAM_PERSP_PULL_MODEL);
add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32,
SI_PARAM_LINEAR_SAMPLE);
add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32,
SI_PARAM_LINEAR_CENTER);
add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32,
SI_PARAM_LINEAR_CENTROID);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_LINE_STIPPLE_TEX);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_POS_X_FLOAT);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_POS_Y_FLOAT);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_POS_Z_FLOAT);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_POS_W_FLOAT);
- add_arg_checked(&fninfo, ARG_VGPR, ctx->i32,
SI_PARAM_FRONT_FACE);
+ add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->i32,
+ &ctx->abi.front_face,
SI_PARAM_FRONT_FACE);
shader->info.face_vgpr_index = 20;
add_arg_checked(&fninfo, ARG_VGPR, ctx->i32,
SI_PARAM_ANCILLARY);
add_arg_checked(&fninfo, ARG_VGPR, ctx->f32,
SI_PARAM_SAMPLE_COVERAGE);
add_arg_checked(&fninfo, ARG_VGPR, ctx->i32,
SI_PARAM_POS_FIXED_PT);
/* Color inputs from the prolog. */
if (shader->selector->info.colors_read) {
unsigned num_color_elements =
util_bitcount(shader->selector->info.colors_read);
--
2.9.3
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