From: Nicolai Hähnle <nicolai.haeh...@amd.com>
---
src/amd/common/ac_nir_to_llvm.c | 28 ++++++++++++++++++++--------
src/amd/common/ac_shader_abi.h | 10 ++++++++++
2 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4fad709..d2238c3 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2189,24 +2189,22 @@ static void visit_store_ssbo(struct nir_to_llvm_context
*ctx,
{
const char *store_name;
LLVMValueRef src_data = get_src(ctx->nir, instr->src[0]);
LLVMTypeRef data_type = ctx->f32;
int elem_size_mult = get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 32;
int components_32bit = elem_size_mult * instr->num_components;
unsigned writemask = nir_intrinsic_write_mask(instr);
LLVMValueRef base_data, base_offset;
LLVMValueRef params[6];
- if (ctx->stage == MESA_SHADER_FRAGMENT)
- ctx->shader_info->fs.writes_memory = true;
-
- params[1] = get_src(ctx->nir, instr->src[1]);
+ params[1] = ctx->abi.load_ssbo(&ctx->abi,
+ get_src(ctx->nir, instr->src[1]), true);
params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
params[4] = ctx->i1false; /* glc */
params[5] = ctx->i1false; /* slc */
if (components_32bit > 1)
data_type = LLVMVectorType(ctx->f32, components_32bit);
base_data = to_float(&ctx->ac, src_data);
base_data = trim_vector(&ctx->ac, base_data, instr->num_components);
base_data = LLVMBuildBitCast(ctx->builder, base_data,
@@ -2269,28 +2267,28 @@ static void visit_store_ssbo(struct nir_to_llvm_context
*ctx,
ctx->voidt, params, 6, 0);
}
}
static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
const nir_intrinsic_instr *instr)
{
const char *name;
LLVMValueRef params[6];
int arg_count = 0;
- if (ctx->stage == MESA_SHADER_FRAGMENT)
- ctx->shader_info->fs.writes_memory = true;
if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
params[arg_count++] = llvm_extract_elem(&ctx->ac,
get_src(ctx->nir, instr->src[3]), 0);
}
params[arg_count++] = llvm_extract_elem(&ctx->ac, get_src(ctx->nir,
instr->src[2]), 0);
- params[arg_count++] = get_src(ctx->nir, instr->src[0]);
+ params[arg_count++] = ctx->abi.load_ssbo(&ctx->abi,
+ get_src(ctx->nir,
instr->src[0]),
+ true);
params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
params[arg_count++] = get_src(ctx->nir, instr->src[1]); /* voffset
*/
params[arg_count++] = ctx->i1false; /* slc */
switch (instr->intrinsic) {
case nir_intrinsic_ssbo_atomic_add:
name = "llvm.amdgcn.buffer.atomic.add";
break;
case nir_intrinsic_ssbo_atomic_imin:
name = "llvm.amdgcn.buffer.atomic.smin";
@@ -2350,21 +2348,23 @@ static LLVMValueRef visit_load_buffer(struct
nir_to_llvm_context *ctx,
if (load_components >= 3)
load_name = "llvm.amdgcn.buffer.load.v4f32";
else if (load_components == 2)
load_name = "llvm.amdgcn.buffer.load.v2f32";
else if (load_components == 1)
load_name = "llvm.amdgcn.buffer.load.f32";
else
unreachable("unhandled number of components");
LLVMValueRef params[] = {
- get_src(ctx->nir, instr->src[0]),
+ ctx->abi.load_ssbo(&ctx->abi,
+ get_src(ctx->nir, instr->src[0]),
+ false),
LLVMConstInt(ctx->i32, 0, false),
offset,
ctx->i1false,
ctx->i1false,
};
results[i] = ac_build_intrinsic(&ctx->ac, load_name, data_type,
params, 5, 0);
}
@@ -4029,20 +4029,31 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
fprintf(stderr, "Unknown intrinsic: ");
nir_print_instr(&instr->instr, stderr);
fprintf(stderr, "\n");
break;
}
if (result) {
_mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result);
}
}
+static LLVMValueRef radv_load_ssbo(struct ac_shader_abi *abi,
+ LLVMValueRef buffer, bool write)
+{
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+
+ if (write && ctx->stage == MESA_SHADER_FRAGMENT)
+ ctx->shader_info->fs.writes_memory = true;
+
+ return buffer;
+}
+
static LLVMValueRef radv_get_sampler_desc(struct ac_shader_abi *abi,
unsigned descriptor_set,
unsigned base_index,
unsigned constant_index,
LLVMValueRef index,
enum ac_descriptor_type desc_type,
bool image, bool write)
{
struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef list = ctx->descriptor_sets[descriptor_set];
@@ -6075,20 +6086,21 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
nir_foreach_variable(variable, &nir->inputs)
handle_shader_input_decl(&ctx, variable);
if (nir->stage == MESA_SHADER_FRAGMENT)
handle_fs_inputs_pre(&ctx, nir);
ctx.abi.chip_class = options->chip_class;
ctx.abi.inputs = &ctx.inputs[0];
ctx.abi.emit_outputs = handle_shader_outputs_post;
+ ctx.abi.load_ssbo = radv_load_ssbo;
ctx.abi.load_sampler_desc = radv_get_sampler_desc;
nir_foreach_variable(variable, &nir->outputs)
scan_shader_output_decl(&ctx, variable);
ac_nir_translate(&ctx.ac, &ctx.abi, nir, &ctx);
LLVMBuildRetVoid(ctx.builder);
ac_llvm_finalize_module(&ctx);
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index d3c1ee1..f9a2c2b 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -50,20 +50,30 @@ struct ac_shader_abi {
*/
LLVMValueRef *inputs;
void (*emit_outputs)(struct ac_shader_abi *abi,
unsigned max_outputs,
LLVMValueRef *addrs);
LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
/**
+ * Load the descriptor for the given buffer.
+ *
+ * \param buffer the buffer as presented in NIR: this is the descriptor
+ * in Vulkan, and the buffer index in OpenGL/Gallium
+ * \param write whether buffer contents will be written
+ */
+ LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi,
+ LLVMValueRef buffer, bool write);
+
+ /**
* Load a descriptor associated to a sampler.
*
* \param descriptor_set the descriptor set index (only for Vulkan)
* \param base_index the base index of the sampler variable
* \param constant_index constant part of an array index (or 0, if the
* sampler variable is not an array)
* \param index non-constant part of an array index (may be NULL)
* \param desc_type the type of descriptor to load
* \param image whether the descriptor is loaded for an image operation
*/
--
2.9.3
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