Oops missed these,
Reviewed-by: Dave Airlie <airl...@redhat.com>
On 11 June 2017 at 08:02, Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> wrote:
> Don't rename the enums and constants used for metadata.
>
> Signed-off-by: Bas Nieuwenhuizen <ba...@google.com>
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 4 +--
> src/amd/vulkan/radv_descriptor_set.c | 2 +-
> src/amd/vulkan/radv_device.c | 48
> +++++++++++++--------------
> src/amd/vulkan/radv_image.c | 2 +-
> src/amd/vulkan/radv_pipeline.c | 2 +-
> src/amd/vulkan/radv_pipeline_cache.c | 2 +-
> src/amd/vulkan/radv_query.c | 2 +-
> src/amd/vulkan/radv_winsys.h | 28 ++++++----------
> src/amd/vulkan/si_cmd_buffer.c | 4 +--
> src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 22 ++++++------
> src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h | 2 +-
> src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 14 ++++----
> 12 files changed, 63 insertions(+), 69 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c
> b/src/amd/vulkan/radv_cmd_buffer.c
> index b57ce9fd1de..0a82bf08ec6 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -258,8 +258,8 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer
> *cmd_buffer,
>
> bo = device->ws->buffer_create(device->ws,
> new_size, 4096,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
>
> if (!bo) {
> cmd_buffer->record_fail = true;
> diff --git a/src/amd/vulkan/radv_descriptor_set.c
> b/src/amd/vulkan/radv_descriptor_set.c
> index 3ea4936bfae..8d2623acd1b 100644
> --- a/src/amd/vulkan/radv_descriptor_set.c
> +++ b/src/amd/vulkan/radv_descriptor_set.c
> @@ -427,7 +427,7 @@ VkResult radv_CreateDescriptorPool(
>
> if (bo_size) {
> pool->bo = device->ws->buffer_create(device->ws, bo_size,
> - 32,
> RADEON_DOMAIN_VRAM, 0);
> + 32, RADV_DOMAIN_VRAM,
> 0);
> pool->mapped_ptr = (uint8_t*)device->ws->buffer_map(pool->bo);
> }
> pool->size = bo_size;
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 52de47f4bdc..63634e0db3d 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -1126,7 +1126,7 @@ VkResult radv_CreateDevice(
>
> if (getenv("RADV_TRACE_FILE")) {
> device->trace_bo = device->ws->buffer_create(device->ws,
> 4096, 8,
> -
> RADEON_DOMAIN_VRAM, RADEON_FLAG_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM, RADV_FLAG_CPU_ACCESS);
> if (!device->trace_bo)
> goto fail;
>
> @@ -1550,8 +1550,8 @@ radv_get_preamble_cs(struct radv_queue *queue,
> scratch_bo =
> queue->device->ws->buffer_create(queue->device->ws,
> scratch_size,
> 4096,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!scratch_bo)
> goto fail;
> } else
> @@ -1561,8 +1561,8 @@ radv_get_preamble_cs(struct radv_queue *queue,
> compute_scratch_bo =
> queue->device->ws->buffer_create(queue->device->ws,
>
> compute_scratch_size,
> 4096,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!compute_scratch_bo)
> goto fail;
>
> @@ -1573,8 +1573,8 @@ radv_get_preamble_cs(struct radv_queue *queue,
> esgs_ring_bo =
> queue->device->ws->buffer_create(queue->device->ws,
>
> esgs_ring_size,
> 4096,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!esgs_ring_bo)
> goto fail;
> } else {
> @@ -1586,8 +1586,8 @@ radv_get_preamble_cs(struct radv_queue *queue,
> gsvs_ring_bo =
> queue->device->ws->buffer_create(queue->device->ws,
>
> gsvs_ring_size,
> 4096,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!gsvs_ring_bo)
> goto fail;
> } else {
> @@ -1599,15 +1599,15 @@ radv_get_preamble_cs(struct radv_queue *queue,
> tess_factor_ring_bo =
> queue->device->ws->buffer_create(queue->device->ws,
>
> tess_factor_ring_size,
> 256,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!tess_factor_ring_bo)
> goto fail;
> tess_offchip_ring_bo =
> queue->device->ws->buffer_create(queue->device->ws,
>
> tess_offchip_ring_size,
> 256,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_NO_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_NO_CPU_ACCESS);
> if (!tess_offchip_ring_bo)
> goto fail;
> } else {
> @@ -1633,8 +1633,8 @@ radv_get_preamble_cs(struct radv_queue *queue,
> descriptor_bo =
> queue->device->ws->buffer_create(queue->device->ws,
> size,
> 4096,
> -
> RADEON_DOMAIN_VRAM,
> -
> RADEON_FLAG_CPU_ACCESS);
> +
> RADV_DOMAIN_VRAM,
> +
> RADV_FLAG_CPU_ACCESS);
> if (!descriptor_bo)
> goto fail;
> } else
> @@ -2074,7 +2074,7 @@ VkResult radv_AllocateMemory(
> RADV_FROM_HANDLE(radv_device, device, _device);
> struct radv_device_memory *mem;
> VkResult result;
> - enum radeon_bo_domain domain;
> + enum radv_bo_domain domain;
> uint32_t flags = 0;
>
> assert(pAllocateInfo->sType ==
> VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO);
> @@ -2117,17 +2117,17 @@ VkResult radv_AllocateMemory(
> uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096);
> if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE
> ||
> pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_CACHED)
> - domain = RADEON_DOMAIN_GTT;
> + domain = RADV_DOMAIN_GTT;
> else
> - domain = RADEON_DOMAIN_VRAM;
> + domain = RADV_DOMAIN_VRAM;
>
> if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_VRAM)
> - flags |= RADEON_FLAG_NO_CPU_ACCESS;
> + flags |= RADV_FLAG_NO_CPU_ACCESS;
> else
> - flags |= RADEON_FLAG_CPU_ACCESS;
> + flags |= RADV_FLAG_CPU_ACCESS;
>
> if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE)
> - flags |= RADEON_FLAG_GTT_WC;
> + flags |= RADV_FLAG_GTT_WC;
>
> mem->bo = device->ws->buffer_create(device->ws, alloc_size, 65536,
> domain, flags);
> @@ -2556,8 +2556,8 @@ VkResult radv_CreateEvent(
> return VK_ERROR_OUT_OF_HOST_MEMORY;
>
> event->bo = device->ws->buffer_create(device->ws, 8, 8,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
> if (!event->bo) {
> vk_free2(&device->alloc, pAllocator, event);
> return VK_ERROR_OUT_OF_DEVICE_MEMORY;
> @@ -2640,7 +2640,7 @@ VkResult radv_CreateBuffer(
> if (pCreateInfo->flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
> buffer->bo = device->ws->buffer_create(device->ws,
> align64(buffer->size,
> 4096),
> - 4096, 0,
> RADEON_FLAG_VIRTUAL);
> + 4096, 0,
> RADV_FLAG_VIRTUAL);
> if (!buffer->bo) {
> vk_free2(&device->alloc, pAllocator, buffer);
> return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index d434bec6738..a324fb97f3a 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -822,7 +822,7 @@ radv_image_create(VkDevice _device,
> image->offset = 0;
>
> image->bo = device->ws->buffer_create(device->ws,
> image->size, image->alignment,
> - 0, RADEON_FLAG_VIRTUAL);
> + 0, RADV_FLAG_VIRTUAL);
> if (!image->bo) {
> vk_free2(&device->alloc, alloc, image);
> return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index e77f9597bac..6677f5ed5aa 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -428,7 +428,7 @@ static void radv_fill_shader_variant(struct radv_device
> *device,
> S_00B848_FLOAT_MODE(variant->config.float_mode);
>
> variant->bo = device->ws->buffer_create(device->ws,
> binary->code_size, 256,
> - RADEON_DOMAIN_VRAM,
> RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_VRAM,
> RADV_FLAG_CPU_ACCESS);
>
> void *ptr = device->ws->buffer_map(variant->bo);
> memcpy(ptr, binary->code, binary->code_size);
> diff --git a/src/amd/vulkan/radv_pipeline_cache.c
> b/src/amd/vulkan/radv_pipeline_cache.c
> index 0ab4d2a26e3..c412ad35791 100644
> --- a/src/amd/vulkan/radv_pipeline_cache.c
> +++ b/src/amd/vulkan/radv_pipeline_cache.c
> @@ -175,7 +175,7 @@ radv_create_shader_variant_from_pipeline_cache(struct
> radv_device *device,
> variant->ref_count = 1;
>
> variant->bo = device->ws->buffer_create(device->ws,
> entry->code_size, 256,
> - RADEON_DOMAIN_VRAM,
> RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_VRAM,
> RADV_FLAG_CPU_ACCESS);
>
> void *ptr = device->ws->buffer_map(variant->bo);
> memcpy(ptr, entry->code, entry->code_size);
> diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
> index 4e21efa611a..98d42296bea 100644
> --- a/src/amd/vulkan/radv_query.c
> +++ b/src/amd/vulkan/radv_query.c
> @@ -779,7 +779,7 @@ VkResult radv_CreateQueryPool(
> size += 4 * pCreateInfo->queryCount;
>
> pool->bo = device->ws->buffer_create(device->ws, size,
> - 64, RADEON_DOMAIN_GTT, 0);
> + 64, RADV_DOMAIN_GTT, 0);
>
> if (!pool->bo) {
> vk_free2(&device->alloc, pAllocator, pool);
> diff --git a/src/amd/vulkan/radv_winsys.h b/src/amd/vulkan/radv_winsys.h
> index f904cd653d4..4487ca60179 100644
> --- a/src/amd/vulkan/radv_winsys.h
> +++ b/src/amd/vulkan/radv_winsys.h
> @@ -41,23 +41,17 @@ struct radeon_surf;
>
> #define FREE(x) free(x)
>
> -enum radeon_bo_domain { /* bitfield */
> - RADEON_DOMAIN_GTT = 2,
> - RADEON_DOMAIN_VRAM = 4,
> - RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT
> +enum radv_bo_domain { /* bitfield */
> + RADV_DOMAIN_GTT = 2,
> + RADV_DOMAIN_VRAM = 4,
> + RADV_DOMAIN_VRAM_GTT = RADV_DOMAIN_VRAM | RADV_DOMAIN_GTT
> };
>
> -enum radeon_bo_flag { /* bitfield */
> - RADEON_FLAG_GTT_WC = (1 << 0),
> - RADEON_FLAG_CPU_ACCESS = (1 << 1),
> - RADEON_FLAG_NO_CPU_ACCESS = (1 << 2),
> - RADEON_FLAG_VIRTUAL = (1 << 3)
> -};
> -
> -enum radeon_bo_usage { /* bitfield */
> - RADEON_USAGE_READ = 2,
> - RADEON_USAGE_WRITE = 4,
> - RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE
> +enum radv_bo_flag { /* bitfield */
> + RADV_FLAG_GTT_WC = (1 << 0),
> + RADV_FLAG_CPU_ACCESS = (1 << 1),
> + RADV_FLAG_NO_CPU_ACCESS = (1 << 2),
> + RADV_FLAG_VIRTUAL = (1 << 3)
> };
>
> enum ring_type {
> @@ -144,8 +138,8 @@ struct radv_winsys {
> struct radv_winsys_bo *(*buffer_create)(struct radv_winsys *ws,
> uint64_t size,
> unsigned alignment,
> - enum radeon_bo_domain
> domain,
> - enum radeon_bo_flag flags);
> + enum radv_bo_domain domain,
> + enum radv_bo_flag flags);
>
> void (*buffer_destroy)(struct radv_winsys_bo *bo);
> void *(*buffer_map)(struct radv_winsys_bo *bo);
> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
> index 25d3b6450be..cc4f547bc07 100644
> --- a/src/amd/vulkan/si_cmd_buffer.c
> +++ b/src/amd/vulkan/si_cmd_buffer.c
> @@ -515,8 +515,8 @@ cik_create_gfx_config(struct radv_device *device)
>
> device->gfx_init = device->ws->buffer_create(device->ws,
> cs->cdw * 4, 4096,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
> if (!device->gfx_init)
> goto fail;
>
> diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
> b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
> index db7ea1f6cb4..802d489bc0a 100644
> --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
> +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
> @@ -257,7 +257,7 @@ static struct radv_winsys_bo *
> radv_amdgpu_winsys_bo_create(struct radv_winsys *_ws,
> uint64_t size,
> unsigned alignment,
> - enum radeon_bo_domain initial_domain,
> + enum radv_bo_domain initial_domain,
> unsigned flags)
> {
> struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
> @@ -281,10 +281,10 @@ radv_amdgpu_winsys_bo_create(struct radv_winsys *_ws,
> bo->va_handle = va_handle;
> bo->size = size;
> bo->ws = ws;
> - bo->is_virtual = !!(flags & RADEON_FLAG_VIRTUAL);
> + bo->is_virtual = !!(flags & RADV_FLAG_VIRTUAL);
> bo->ref_count = 1;
>
> - if (flags & RADEON_FLAG_VIRTUAL) {
> + if (flags & RADV_FLAG_VIRTUAL) {
> bo->ranges = realloc(NULL, sizeof(struct
> radv_amdgpu_map_range));
> bo->range_count = 1;
> bo->range_capacity = 1;
> @@ -301,16 +301,16 @@ radv_amdgpu_winsys_bo_create(struct radv_winsys *_ws,
> request.alloc_size = size;
> request.phys_alignment = alignment;
>
> - if (initial_domain & RADEON_DOMAIN_VRAM)
> + if (initial_domain & RADV_DOMAIN_VRAM)
> request.preferred_heap |= AMDGPU_GEM_DOMAIN_VRAM;
> - if (initial_domain & RADEON_DOMAIN_GTT)
> + if (initial_domain & RADV_DOMAIN_GTT)
> request.preferred_heap |= AMDGPU_GEM_DOMAIN_GTT;
>
> - if (flags & RADEON_FLAG_CPU_ACCESS)
> + if (flags & RADV_FLAG_CPU_ACCESS)
> request.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
> - if (flags & RADEON_FLAG_NO_CPU_ACCESS)
> + if (flags & RADV_FLAG_NO_CPU_ACCESS)
> request.flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
> - if (flags & RADEON_FLAG_GTT_WC)
> + if (flags & RADV_FLAG_GTT_WC)
> request.flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
>
> r = amdgpu_bo_alloc(ws->dev, &request, &buf_handle);
> @@ -379,7 +379,7 @@ radv_amdgpu_winsys_bo_from_fd(struct radv_winsys *_ws,
> enum amdgpu_bo_handle_type type = amdgpu_bo_handle_type_dma_buf_fd;
> struct amdgpu_bo_import_result result = {0};
> struct amdgpu_bo_info info = {0};
> - enum radeon_bo_domain initial = 0;
> + enum radv_bo_domain initial = 0;
> int r;
> bo = CALLOC_STRUCT(radv_amdgpu_winsys_bo);
> if (!bo)
> @@ -403,9 +403,9 @@ radv_amdgpu_winsys_bo_from_fd(struct radv_winsys *_ws,
> goto error_va_map;
>
> if (info.preferred_heap & AMDGPU_GEM_DOMAIN_VRAM)
> - initial |= RADEON_DOMAIN_VRAM;
> + initial |= RADV_DOMAIN_VRAM;
> if (info.preferred_heap & AMDGPU_GEM_DOMAIN_GTT)
> - initial |= RADEON_DOMAIN_GTT;
> + initial |= RADV_DOMAIN_GTT;
>
> bo->bo = result.buf_handle;
> bo->va = va;
> diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h
> b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h
> index f9c4bf5ccdd..3d37d434c78 100644
> --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h
> +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h
> @@ -51,7 +51,7 @@ struct radv_amdgpu_winsys_bo {
> /* physical bo */
> struct {
> amdgpu_bo_handle bo;
> - enum radeon_bo_domain initial_domain;
> + enum radv_bo_domain initial_domain;
> bool is_shared;
> struct list_head global_list_item;
> };
> diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
> b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
> index bd28524efa0..4e13400b626 100644
> --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
> +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
> @@ -193,8 +193,8 @@ radv_amdgpu_cs_create(struct radv_winsys *ws,
>
> if (cs->ws->use_ib_bos) {
> cs->ib_buffer = ws->buffer_create(ws, ib_size, 0,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
> if (!cs->ib_buffer) {
> free(cs);
> return NULL;
> @@ -278,8 +278,8 @@ static void radv_amdgpu_cs_grow(struct radv_winsys_cs
> *_cs, size_t min_size)
> cs->old_ib_buffers[cs->num_old_ib_buffers++] = cs->ib_buffer;
>
> cs->ib_buffer = cs->ws->base.buffer_create(&cs->ws->base, ib_size, 0,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
>
> if (!cs->ib_buffer) {
> cs->base.cdw = 0;
> @@ -839,7 +839,7 @@ static int radv_amdgpu_winsys_cs_submit_sysmem(struct
> radv_winsys_ctx *_ctx,
>
> assert(cnt);
>
> - bo = ws->buffer_create(ws, 4 * size, 4096, RADEON_DOMAIN_GTT,
> RADEON_FLAG_CPU_ACCESS);
> + bo = ws->buffer_create(ws, 4 * size, 4096, RADV_DOMAIN_GTT,
> RADV_FLAG_CPU_ACCESS);
> ptr = ws->buffer_map(bo);
>
> if (preamble_cs) {
> @@ -994,8 +994,8 @@ static struct radv_winsys_ctx
> *radv_amdgpu_ctx_create(struct radv_winsys *_ws)
>
> assert(AMDGPU_HW_IP_NUM * MAX_RINGS_PER_TYPE * sizeof(uint64_t) <=
> 4096);
> ctx->fence_bo = ws->base.buffer_create(&ws->base, 4096, 8,
> - RADEON_DOMAIN_GTT,
> - RADEON_FLAG_CPU_ACCESS);
> + RADV_DOMAIN_GTT,
> + RADV_FLAG_CPU_ACCESS);
> if (ctx->fence_bo)
> ctx->fence_map =
> (uint64_t*)ws->base.buffer_map(ctx->fence_bo);
> if (ctx->fence_map)
> --
> 2.13.0
>
> _______________________________________________
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> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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