From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/r600/r600_blit.c | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 10 +++++++++-
src/gallium/drivers/radeonsi/si_blit.c | 4 +++-
4 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_blit.c
b/src/gallium/drivers/r600/r600_blit.c
index 79505d5..f83709f 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -400,21 +400,21 @@ static bool r600_decompress_subresource(struct
pipe_context *ctx,
static void r600_clear(struct pipe_context *ctx, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil)
{
struct r600_context *rctx = (struct r600_context *)ctx;
struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
evergreen_do_fast_color_clear(&rctx->b, fb,
&rctx->framebuffer.atom,
- &buffers, NULL, color);
+ &buffers, NULL, 0, color);
if (!buffers)
return; /* all buffers have been fast cleared */
}
if (buffers & PIPE_CLEAR_COLOR) {
int i;
/* These buffers cannot use fast clear, make sure to disable
expansion. */
for (i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
b/src/gallium/drivers/radeon/r600_pipe_common.h
index 053c928..3786042 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -837,20 +837,21 @@ void vi_separate_dcc_stop_query(struct pipe_context *ctx,
struct r600_texture *tex);
void vi_separate_dcc_process_and_reset_stats(struct pipe_context *ctx,
struct r600_texture *tex);
void vi_dcc_clear_level(struct r600_common_context *rctx,
struct r600_texture *rtex,
unsigned level, unsigned clear_value);
void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
struct pipe_framebuffer_state *fb,
struct r600_atom *fb_state,
unsigned *buffers, ubyte *dirty_cbufs,
+ ubyte srgb_enable,
const union pipe_color_union *color);
bool r600_texture_disable_dcc(struct r600_common_context *rctx,
struct r600_texture *rtex);
void r600_init_screen_texture_functions(struct r600_common_screen *rscreen);
void r600_init_context_texture_functions(struct r600_common_context *rctx);
/* r600_viewport.c */
void evergreen_apply_scissor_bug_workaround(struct r600_common_context *rctx,
struct pipe_scissor_state *scissor);
void r600_viewport_set_rast_deps(struct r600_common_context *rctx,
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 25abdd6..f2c25cc 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2622,20 +2622,21 @@ static void si_set_optimal_micro_tile_mode(struct
r600_common_screen *rscreen,
rtex->surface.micro_tile_mode =
rtex->last_msaa_resolve_target_micro_mode;
p_atomic_inc(&rscreen->dirty_tex_counter);
}
void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
struct pipe_framebuffer_state *fb,
struct r600_atom *fb_state,
unsigned *buffers, ubyte *dirty_cbufs,
+ ubyte srgb_enable,
const union pipe_color_union *color)
{
int i;
/* This function is broken in BE, so just disable this path for now */
#ifdef PIPE_ARCH_BIG_ENDIAN
return;
#endif
if (rctx->render_cond)
@@ -2758,21 +2759,28 @@ void evergreen_do_fast_color_clear(struct
r600_common_context *rctx,
tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
if (need_compressed_update)
p_atomic_inc(&rctx->screen->compressed_colortex_counter);
}
/* We can change the micro tile mode before a full clear. */
if (rctx->screen->chip_class >= SI)
si_set_optimal_micro_tile_mode(rctx->screen, tex);
- evergreen_set_clear_color(tex, fb->cbufs[i]->format, color);
+ /* Apply srgb_enable. */
+ struct r600_surface *surf = (struct r600_surface*)fb->cbufs[i];
+ enum pipe_format format = fb->cbufs[i]->format;
+
+ if (surf->srgb_allowed && srgb_enable & (1 << i))
+ format = util_format_srgb(format);
+
+ evergreen_set_clear_color(tex, format, color);
if (dirty_cbufs)
*dirty_cbufs |= 1 << i;
rctx->set_atom_dirty(rctx, fb_state, true);
*buffers &= ~clear_bit;
}
}
void r600_init_screen_texture_functions(struct r600_common_screen *rscreen)
{
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index 524b20a..8846712 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -686,29 +686,31 @@ void si_decompress_compute_textures(struct si_context
*sctx)
{
si_decompress_textures(sctx, 1 << PIPE_SHADER_COMPUTE);
}
static void si_clear(struct pipe_context *ctx, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil)
{
struct si_context *sctx = (struct si_context *)ctx;
struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
+ struct si_state_blend *blend = sctx->queued.named.blend;
+ ubyte srgb_enable = blend ? blend->srgb_enable : 0;
struct pipe_surface *zsbuf = fb->zsbuf;
struct r600_texture *zstex =
zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
if (buffers & PIPE_CLEAR_COLOR) {
evergreen_do_fast_color_clear(&sctx->b, fb,
&sctx->framebuffer.atom, &buffers,
&sctx->framebuffer.dirty_cbufs,
- color);
+ srgb_enable, color);
if (!buffers)
return; /* all buffers have been fast cleared */
}
if (buffers & PIPE_CLEAR_COLOR) {
int i;
/* These buffers cannot use fast clear, make sure to disable
expansion. */
for (i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
--
2.7.4
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
