On Mon, May 22, 2017 at 11:23 AM, Anuj Phogat <anuj.pho...@gmail.com> wrote: > On Mon, May 22, 2017 at 10:07 AM, Rafael Antognolli > <rafael.antogno...@intel.com> wrote: >> On Fri, May 12, 2017 at 04:38:10PM -0700, Anuj Phogat wrote: >>> These declarations will help the code start compiling >>> once we wire up the makefiles for gen10. Later patches >>> will start using these functions for gen10. >>> >>> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> >>> --- >>> src/intel/isl/isl_priv.h | 12 ++++++++++++ >>> src/mesa/drivers/dri/i965/brw_blorp.h | 2 ++ >>> src/mesa/drivers/dri/i965/brw_state.h | 1 + >>> 3 files changed, 15 insertions(+) >>> >>> diff --git a/src/intel/isl/isl_priv.h b/src/intel/isl/isl_priv.h >>> index 3c4cc1e..04adefa 100644 >>> --- a/src/intel/isl/isl_priv.h >>> +++ b/src/intel/isl/isl_priv.h >>> @@ -178,6 +178,10 @@ isl_gen9_surf_fill_state_s(const struct isl_device >>> *dev, void *state, >>> const struct isl_surf_fill_state_info *restrict >>> info); >>> >>> void >>> +isl_gen10_surf_fill_state_s(const struct isl_device *dev, void *state, >>> + const struct isl_surf_fill_state_info >>> *restrict info); >>> + >>> +void >>> isl_gen4_buffer_fill_state_s(void *state, >>> const struct isl_buffer_fill_state_info >>> *restrict info); >>> >>> @@ -206,6 +210,10 @@ isl_gen9_buffer_fill_state_s(void *state, >>> const struct isl_buffer_fill_state_info >>> *restrict info); >>> >>> void >>> +isl_gen10_buffer_fill_state_s(void *state, >>> + const struct isl_buffer_fill_state_info >>> *restrict info); >>> + >>> +void >>> isl_gen4_emit_depth_stencil_hiz_s(const struct isl_device *dev, void >>> *batch, >>> const struct >>> isl_depth_stencil_hiz_emit_info *restrict info); >>> >>> @@ -233,4 +241,8 @@ void >>> isl_gen9_emit_depth_stencil_hiz_s(const struct isl_device *dev, void >>> *batch, >>> const struct >>> isl_depth_stencil_hiz_emit_info *restrict info); >>> >>> +void >>> +isl_gen10_emit_depth_stencil_hiz_s(const struct isl_device *dev, void >>> *batch, >>> + const struct >>> isl_depth_stencil_hiz_emit_info *restrict info); >>> + >>> #endif /* ISL_PRIV_H */ >>> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h >>> b/src/mesa/drivers/dri/i965/brw_blorp.h >>> index ee4bf3b..d635d79 100644 >>> --- a/src/mesa/drivers/dri/i965/brw_blorp.h >>> +++ b/src/mesa/drivers/dri/i965/brw_blorp.h >>> @@ -82,6 +82,8 @@ void gen8_blorp_exec(struct blorp_batch *batch, >>> const struct blorp_params *params); >>> void gen9_blorp_exec(struct blorp_batch *batch, >>> const struct blorp_params *params); >>> +void gen10_blorp_exec(struct blorp_batch *batch, >>> + const struct blorp_params *params); >>> >>> #ifdef __cplusplus >>> } /* extern "C" */ >>> diff --git a/src/mesa/drivers/dri/i965/brw_state.h >>> b/src/mesa/drivers/dri/i965/brw_state.h >>> index 4727e2a..4592e3e 100644 >>> --- a/src/mesa/drivers/dri/i965/brw_state.h >>> +++ b/src/mesa/drivers/dri/i965/brw_state.h >>> @@ -364,6 +364,7 @@ void gen7_init_atoms(struct brw_context *brw); >>> void gen75_init_atoms(struct brw_context *brw); >>> void gen8_init_atoms(struct brw_context *brw); >>> void gen9_init_atoms(struct brw_context *brw); >>> +void gen10_init_atoms(struct brw_context *brw); >> >> I couldn't find it in the other patches, so pardon me if you did it. But you >> should also use the gen10_init_atoms inside brw_init_state() - >> brw_state_upload.c. >> > It is in [PATCH V2 14/24] i965/cnl: Handle gen10 in switch cases > across the driver Rafael, do you have any other questions for this patch?
>>> void upload_gs_state_for_tf(struct brw_context *brw); >>> >>> -- >>> 2.9.3 >>> >>> _______________________________________________ >>> mesa-dev mailing list >>> mesa-dev@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
